flash/nor/stm32: Eliminate working area leak
[openocd.git] / src / flash / nor / stm32h7x.c
index 01e6f06dce2f6f39b180bfbf676ea0d99a6bf2da..f2ddaf44730d0a3da5da4cf58f55df395de87f15 100644 (file)
@@ -220,6 +220,8 @@ static int stm32x_wait_status_busy(struct flash_bank *bank, int timeout)
 
        /* Clear error + EOP flags but report errors */
        if (status & FLASH_ERROR) {
+               if (retval == ERROR_OK)
+                       retval = ERROR_FAIL;
                /* If this operation fails, we ignore it and report the original retval */
                target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CCR), status);
        }
@@ -495,7 +497,7 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last)
                retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
 
                if (retval != ERROR_OK) {
-                       LOG_ERROR("erase time-out error sector %d", i);
+                       LOG_ERROR("erase time-out or operation error sector %d", i);
                        return retval;
                }
                bank->sectors[i].is_erased = 1;
@@ -568,51 +570,8 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
        struct stm32h7x_flash_bank *stm32x_info = bank->driver_priv;
        int retval = ERROR_OK;
 
-       /* see contrib/loaders/flash/smt32h7x.S for src */
        static const uint8_t stm32x_flash_write_code[] = {
-                                                               /* <code>: */
-               0x45, 0x68,                             /*              ldr             r5, [r0, #4] */
-                                                               /* <wait_fifo>: */
-               0x06, 0x68,                             /*              ldr             r6, [r0, #0] */
-               0x26, 0xb3,                             /*              cbz             r6, <exit> */
-               0x76, 0x1b,                             /*              subs    r6, r6, r5 */
-               0x42, 0xbf,                             /*              ittt    mi */
-               0x76, 0x18,                             /*              addmi   r6, r6, r1 */
-               0x36, 0x1a,                             /*              submi   r6, r6, r0 */
-               0x08, 0x3e,                             /*              submi   r6, #8 */
-               0x20, 0x2e,                             /*              cmp             r6, #32 */
-               0xf6, 0xd3,                             /*              bcc.n   <wait_fifo> */
-               0x4f, 0xf0, 0x32, 0x06, /*              mov.w   r6, #STM32_PROG */
-               0xe6, 0x60,                             /*              str             r6, [r4, #STM32_FLASH_CR_OFFSET] */
-               0x4f, 0xf0, 0x08, 0x07, /*              mov.w   r7, #8 */
-                                                               /* <write_flash>: */
-               0x55, 0xf8, 0x04, 0x6b, /*              ldr.w   r6, [r5], #4 */
-               0x42, 0xf8, 0x04, 0x6b, /*              str.w   r6, [r2], #4 */
-               0xbf, 0xf3, 0x4f, 0x8f, /*              dsb             sy */
-               0x8d, 0x42,                             /*              cmp             r5, r1 */
-               0x28, 0xbf,                             /*              it              cs */
-               0x00, 0xf1, 0x08, 0x05, /*              addcs.w r5, r0, #8 */
-               0x01, 0x3f,                             /*              subs    r7, #1 */
-               0xf3, 0xd1,                             /*              bne.n   <write_flash> */
-                                                               /* <busy>: */
-               0x26, 0x69,                             /*              ldr             r6, [r4, #STM32_FLASH_SR_OFFSET] */
-               0x16, 0xf0, 0x01, 0x0f, /*              tst.w   r6, #STM32_SR_BUSY_MASK */
-               0xfb, 0xd1,                             /*              bne.n   <busy> */
-               0x05, 0x4f,                             /*              ldr             r7, [pc, #20] ; (<stm32_sr_error_mask>) */
-               0x3e, 0x42,                             /*              tst             r6, r7 */
-               0x03, 0xd1,                             /*              bne.n   <error> */
-               0x45, 0x60,                             /*              str             r5, [r0, #4] */
-               0x01, 0x3b,                             /*              subs    r3, #1 */
-               0xdb, 0xd1,                             /*              bne.n   <wait_fifo> */
-               0x01, 0xe0,                             /*              b.n             <exit> */
-                                                               /* <error>: */
-               0x00, 0x27,                             /*              movs    r7, #0 */
-               0x47, 0x60,                             /*              str             r7, [r0, #4] */
-                                                               /* <exit>: */
-               0x30, 0x46,                             /*              mov             r0, r6 */
-               0x00, 0xbe,                             /*              bkpt    0x0000 */
-                                                               /* <stm32_sr_error_mask>: */
-               0x00, 0x00, 0xee, 0x03  /*              .word   0x03ee0000 ; (STM32_SR_ERROR_MASK) */
+#include "../../../contrib/loaders/flash/stm32/stm32h7x.inc"
        };
 
        if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code),
@@ -624,8 +583,10 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
        retval = target_write_buffer(target, write_algorithm->address,
                        sizeof(stm32x_flash_write_code),
                        stm32x_flash_write_code);
-       if (retval != ERROR_OK)
+       if (retval != ERROR_OK) {
+               target_free_working_area(target, write_algorithm);
                return retval;
+       }
 
        /* memory buffer */
        while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
@@ -1180,4 +1141,5 @@ struct flash_driver stm32h7x_flash = {
        .erase_check = default_flash_blank_check,
        .protect_check = stm32x_protect_check,
        .info = stm32x_get_info,
+       .free_driver_priv = default_flash_free_driver_priv,
 };

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)