Code Review / openocd.git / blobdiff
? search:
summary | shortlog | log | commit | commitdiff | review | tree
raw | inline | side by side
FLASH/NOR: Remove useless file stm32x.h
[openocd.git] / src / flash / nor / stm32x.c
diff --git a/src/flash/nor/stm32x.c b/src/flash/nor/stm32x.c
index 9decac27ee5d58cafefead1afd060ae47acf4d7f..0edadfd2ae82e90b98eedcd24d8d2f5265b41120 100644 (file)
--- a/src/flash/nor/stm32x.c
+++ b/src/flash/nor/stm32x.c
@@ -25,12 +25,85 @@
 #endif
 
 #include "imp.h"
-#include "stm32x.h"
 #include <helper/binarybuffer.h>
 #include <target/algorithm.h>
 #include <target/armv7m.h>
 
 
+/* stm32x register locations */
+
+#define STM32_FLASH_ACR                0x40022000
+#define STM32_FLASH_KEYR       0x40022004
+#define STM32_FLASH_OPTKEYR    0x40022008
+#define STM32_FLASH_SR         0x4002200C
+#define STM32_FLASH_CR         0x40022010
+#define STM32_FLASH_AR         0x40022014
+#define STM32_FLASH_OBR                0x4002201C
+#define STM32_FLASH_WRPR       0x40022020
+
+/* option byte location */
+
+#define STM32_OB_RDP           0x1FFFF800
+#define STM32_OB_USER          0x1FFFF802
+#define STM32_OB_DATA0         0x1FFFF804
+#define STM32_OB_DATA1         0x1FFFF806
+#define STM32_OB_WRP0          0x1FFFF808
+#define STM32_OB_WRP1          0x1FFFF80A
+#define STM32_OB_WRP2          0x1FFFF80C
+#define STM32_OB_WRP3          0x1FFFF80E
+
+/* FLASH_CR register bits */
+
+#define FLASH_PG               (1 << 0)
+#define FLASH_PER              (1 << 1)
+#define FLASH_MER              (1 << 2)
+#define FLASH_OPTPG            (1 << 4)
+#define FLASH_OPTER            (1 << 5)
+#define FLASH_STRT             (1 << 6)
+#define FLASH_LOCK             (1 << 7)
+#define FLASH_OPTWRE   (1 << 9)
+
+/* FLASH_SR register bits */
+
+#define FLASH_BSY              (1 << 0)
+#define FLASH_PGERR            (1 << 2)
+#define FLASH_WRPRTERR (1 << 4)
+#define FLASH_EOP              (1 << 5)
+
+/* STM32_FLASH_OBR bit definitions (reading) */
+
+#define OPT_ERROR              0
+#define OPT_READOUT            1
+#define OPT_RDWDGSW            2
+#define OPT_RDRSTSTOP  3
+#define OPT_RDRSTSTDBY 4
+
+/* register unlock keys */
+
+#define KEY1                   0x45670123
+#define KEY2                   0xCDEF89AB
+
+
+struct stm32x_options
+{
+       uint16_t RDP;
+       uint16_t user_options;
+       uint16_t protection[4];
+};
+
+struct stm32x_flash_bank
+{
+       struct stm32x_options option_bytes;
+       struct working_area *write_algorithm;
+       int ppage_size;
+       int probed;
+};
+
+struct stm32x_mem_layout {
+       uint32_t sector_start;
+       uint32_t sector_size;
+};
+
 static int stm32x_mass_erase(struct flash_bank *bank);
 
 /* flash bank stm32x <base> <size> 0 0 <target#>
@@ -115,7 +188,9 @@ static int stm32x_read_options(struct flash_bank *bank)
        stm32x_info = bank->driver_priv;
 
        /* read current option bytes */
-       target_read_u32(target, STM32_FLASH_OBR, &optiondata);
+       int retval = target_read_u32(target, STM32_FLASH_OBR, &optiondata);
+       if (retval != ERROR_OK)
+               return retval;
 
        stm32x_info->option_bytes.user_options = (uint16_t)0xFFF8 | ((optiondata >> 2) & 0x07);
        stm32x_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
@@ -124,7 +199,9 @@ static int stm32x_read_options(struct flash_bank *bank)
                LOG_INFO("Device Security Bit Set");
 
        /* each bit refers to a 4bank protection */
-       target_read_u32(target, STM32_FLASH_WRPR, &optiondata);
+       retval = target_read_u32(target, STM32_FLASH_WRPR, &optiondata);
+       if (retval != ERROR_OK)
+               return retval;
 
        stm32x_info->option_bytes.protection[0] = (uint16_t)optiondata;
        stm32x_info->option_bytes.protection[1] = (uint16_t)(optiondata >> 8);
@@ -145,18 +222,31 @@ static int stm32x_erase_options(struct flash_bank *bank)
        stm32x_read_options(bank);
 
        /* unlock flash registers */
-       target_write_u32(target, STM32_FLASH_KEYR, KEY1);
-       target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+       int retval = target_write_u32(target, STM32_FLASH_KEYR, KEY1);
+       if (retval != ERROR_OK)
+               return retval;
+
+       retval = target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+       if (retval != ERROR_OK)
+               return retval;
 
        /* unlock option flash registers */
-       target_write_u32(target, STM32_FLASH_OPTKEYR, KEY1);
-       target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2);
+       retval = target_write_u32(target, STM32_FLASH_OPTKEYR, KEY1);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2);
+       if (retval != ERROR_OK)
+               return retval;
 
        /* erase option bytes */
-       target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE);
-       target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
+       retval = target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
+       if (retval != ERROR_OK)
+               return retval;
 
-       int retval = stm32x_wait_status_busy(bank, 10);
+       retval = stm32x_wait_status_busy(bank, 10);
        if (retval != ERROR_OK)
                return retval;
 
@@ -175,59 +265,83 @@ static int stm32x_write_options(struct flash_bank *bank)
        stm32x_info = bank->driver_priv;
 
        /* unlock flash registers */
-       target_write_u32(target, STM32_FLASH_KEYR, KEY1);
-       target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+       int retval = target_write_u32(target, STM32_FLASH_KEYR, KEY1);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+       if (retval != ERROR_OK)
+               return retval;
 
        /* unlock option flash registers */
-       target_write_u32(target, STM32_FLASH_OPTKEYR, KEY1);
-       target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2);
+       retval = target_write_u32(target, STM32_FLASH_OPTKEYR, KEY1);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2);
+       if (retval != ERROR_OK)
+               return retval;
 
        /* program option bytes */
-       target_write_u32(target, STM32_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE);
+       retval = target_write_u32(target, STM32_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE);
+       if (retval != ERROR_OK)
+               return retval;
 
        /* write user option byte */
-       target_write_u16(target, STM32_OB_USER, stm32x_info->option_bytes.user_options);
+       retval = target_write_u16(target, STM32_OB_USER, stm32x_info->option_bytes.user_options);
+       if (retval != ERROR_OK)
+               return retval;
 
-       int retval = stm32x_wait_status_busy(bank, 10);
+       retval = stm32x_wait_status_busy(bank, 10);
        if (retval != ERROR_OK)
                return retval;
 
        /* write protection byte 1 */
-       target_write_u16(target, STM32_OB_WRP0, stm32x_info->option_bytes.protection[0]);
+       retval = target_write_u16(target, STM32_OB_WRP0, stm32x_info->option_bytes.protection[0]);
+       if (retval != ERROR_OK)
+               return retval;
 
        retval = stm32x_wait_status_busy(bank, 10);
        if (retval != ERROR_OK)
                return retval;
 
        /* write protection byte 2 */
-       target_write_u16(target, STM32_OB_WRP1, stm32x_info->option_bytes.protection[1]);
+       retval = target_write_u16(target, STM32_OB_WRP1, stm32x_info->option_bytes.protection[1]);
+       if (retval != ERROR_OK)
+               return retval;
 
        retval = stm32x_wait_status_busy(bank, 10);
        if (retval != ERROR_OK)
                return retval;
 
        /* write protection byte 3 */
-       target_write_u16(target, STM32_OB_WRP2, stm32x_info->option_bytes.protection[2]);
+       retval = target_write_u16(target, STM32_OB_WRP2, stm32x_info->option_bytes.protection[2]);
+       if (retval != ERROR_OK)
+               return retval;
 
        retval = stm32x_wait_status_busy(bank, 10);
        if (retval != ERROR_OK)
                return retval;
 
        /* write protection byte 4 */
-       target_write_u16(target, STM32_OB_WRP3, stm32x_info->option_bytes.protection[3]);
+       retval = target_write_u16(target, STM32_OB_WRP3, stm32x_info->option_bytes.protection[3]);
+       if (retval != ERROR_OK)
+               return retval;
 
        retval = stm32x_wait_status_busy(bank, 10);
        if (retval != ERROR_OK)
                return retval;
 
        /* write readout protection bit */
-       target_write_u16(target, STM32_OB_RDP, stm32x_info->option_bytes.RDP);
+       retval = target_write_u16(target, STM32_OB_RDP, stm32x_info->option_bytes.RDP);
+       if (retval != ERROR_OK)
+               return retval;
 
        retval = stm32x_wait_status_busy(bank, 10);
        if (retval != ERROR_OK)
                return retval;
 
-       target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
+       retval = target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
+       if (retval != ERROR_OK)
+               return retval;
 
        return ERROR_OK;
 }
@@ -250,7 +364,9 @@ static int stm32x_protect_check(struct flash_bank *bank)
 
        /* medium density - each bit refers to a 4bank protection
         * high density - each bit refers to a 2bank protection */
-       target_read_u32(target, STM32_FLASH_WRPR, &protection);
+       int retval = target_read_u32(target, STM32_FLASH_WRPR, &protection);
+       if (retval != ERROR_OK)
+               return retval;
 
        /* medium density - each protection bit is for 4 * 1K pages
         * high density - each protection bit is for 2 * 2K pages */
@@ -321,23 +437,35 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last)
        }
 
        /* unlock flash registers */
-       target_write_u32(target, STM32_FLASH_KEYR, KEY1);
-       target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+       int retval = target_write_u32(target, STM32_FLASH_KEYR, KEY1);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+       if (retval != ERROR_OK)
+               return retval;
 
        for (i = first; i <= last; i++)
        {
-               target_write_u32(target, STM32_FLASH_CR, FLASH_PER);
-               target_write_u32(target, STM32_FLASH_AR, bank->base + bank->sectors[i].offset);
-               target_write_u32(target, STM32_FLASH_CR, FLASH_PER | FLASH_STRT);
+               retval = target_write_u32(target, STM32_FLASH_CR, FLASH_PER);
+               if (retval != ERROR_OK)
+                       return retval;
+               retval = target_write_u32(target, STM32_FLASH_AR, bank->base + bank->sectors[i].offset);
+               if (retval != ERROR_OK)
+                       return retval;
+               retval = target_write_u32(target, STM32_FLASH_CR, FLASH_PER | FLASH_STRT);
+               if (retval != ERROR_OK)
+                       return retval;
 
-               int retval = stm32x_wait_status_busy(bank, 100);
+               retval = stm32x_wait_status_busy(bank, 100);
                if (retval != ERROR_OK)
                        return retval;
 
                bank->sectors[i].is_erased = 1;
        }
 
-       target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
+       retval = target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
+       if (retval != ERROR_OK)
+               return retval;
 
        return ERROR_OK;
 }
@@ -369,7 +497,9 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last)
 
        /* medium density - each bit refers to a 4bank protection
         * high density - each bit refers to a 2bank protection */
-       target_read_u32(target, STM32_FLASH_WRPR, &protection);
+       int retval = target_read_u32(target, STM32_FLASH_WRPR, &protection);
+       if (retval != ERROR_OK)
+               return retval;
 
        prot_reg[0] = (uint16_t)protection;
        prot_reg[1] = (uint16_t)(protection >> 8);
@@ -446,25 +576,26 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
        /* see contib/loaders/flash/stm32x.s for src */
 
        static const uint8_t stm32x_flash_write_code[] = {
+                                                                       /* #define STM32_FLASH_CR_OFFSET        0x10 */
+                                                                       /* #define STM32_FLASH_SR_OFFSET        0x0C */
                                                                        /* write: */
-               0xDF, 0xF8, 0x24, 0x40,         /* ldr  r4, STM32_FLASH_CR */
-               0x09, 0x4D,                                     /* ldr  r5, STM32_FLASH_SR */
-               0x4F, 0xF0, 0x01, 0x03,         /* mov  r3, #1 */
-               0x23, 0x60,                                     /* str  r3, [r4, #0] */
-               0x30, 0xF8, 0x02, 0x3B,         /* ldrh r3, [r0], #2 */
-               0x21, 0xF8, 0x02, 0x3B,         /* strh r3, [r1], #2 */
+               0xdf, 0xf8, 0x20, 0x40,         /* ldr  r4, STM32_FLASH_BASE */
+                                                                       /* write_half_word: */
+               0x01, 0x23,                                     /* movs r3, #0x01 */
+               0x23, 0x61,                                     /* str  r3, [r4, #STM32_FLASH_CR_OFFSET] */
+               0x30, 0xf8, 0x02, 0x3b,         /* ldrh r3, [r0], #0x02 */
+               0x21, 0xf8, 0x02, 0x3b,         /* strh r3, [r1], #0x02 */
                                                                        /* busy: */
-               0x2B, 0x68,                                     /* ldr  r3, [r5, #0] */
-               0x13, 0xF0, 0x01, 0x0F,         /* tst  r3, #0x01 */
-               0xFB, 0xD0,                                     /* beq  busy */
-               0x13, 0xF0, 0x14, 0x0F,         /* tst  r3, #0x14 */
-               0x01, 0xD1,                                     /* bne  exit */
-               0x01, 0x3A,                                     /* subs r2, r2, #1 */
-               0xED, 0xD1,                                     /* bne  write */
+               0xe3, 0x68,                                     /* ldr  r3, [r4, #STM32_FLASH_SR_OFFSET] */
+               0x13, 0xf0, 0x01, 0x0f,         /* tst  r3, #0x01 */
+               0xfb, 0xd0,                                     /* beq  busy */
+               0x13, 0xf0, 0x14, 0x0f,         /* tst  r3, #0x14 */
+               0x01, 0xd1,                                     /* bne  exit */
+               0x01, 0x3a,                                     /* subs r2, r2, #0x01 */
+               0xf0, 0xd1,                                     /* bne  write_half_word */
                                                                        /* exit: */
-               0x00, 0xBE,                             /* bkpt #0 */
-               0x10, 0x20, 0x02, 0x40,         /* STM32_FLASH_CR:      .word 0x40022010 */
-               0x0C, 0x20, 0x02, 0x40          /* STM32_FLASH_SR:      .word 0x4002200C */
+               0x00, 0xbe,                                     /* bkpt #0x00 */
+               0x00, 0x20, 0x02, 0x40,         /* STM32_FLASH_BASE: .word 0x40022000 */
        };
 
        /* flash write code */
@@ -583,8 +714,12 @@ static int stm32x_write(struct flash_bank *bank, uint8_t *buffer,
        }
 
        /* unlock flash registers */
-       target_write_u32(target, STM32_FLASH_KEYR, KEY1);
-       target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+       retval = target_write_u32(target, STM32_FLASH_KEYR, KEY1);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+       if (retval != ERROR_OK)
+               return retval;
 
        /* multiple half words (2-byte) to be programmed? */
        if (words_remaining > 0)
@@ -607,13 +742,20 @@ static int stm32x_write(struct flash_bank *bank, uint8_t *buffer,
                }
        }
 
+       if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
+               return retval;
+
        while (words_remaining > 0)
        {
                uint16_t value;
                memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
 
-               target_write_u32(target, STM32_FLASH_CR, FLASH_PG);
-               target_write_u16(target, address, value);
+               retval = target_write_u32(target, STM32_FLASH_CR, FLASH_PG);
+               if (retval != ERROR_OK)
+                       return retval;
+               retval = target_write_u16(target, address, value);
+               if (retval != ERROR_OK)
+                       return retval;
 
                retval = stm32x_wait_status_busy(bank, 5);
                if (retval != ERROR_OK)
@@ -629,17 +771,19 @@ static int stm32x_write(struct flash_bank *bank, uint8_t *buffer,
                uint16_t value = 0xffff;
                memcpy(&value, buffer + bytes_written, bytes_remaining);
 
-               target_write_u32(target, STM32_FLASH_CR, FLASH_PG);
-               target_write_u16(target, address, value);
+               retval = target_write_u32(target, STM32_FLASH_CR, FLASH_PG);
+               if (retval != ERROR_OK)
+                       return retval;
+               retval = target_write_u16(target, address, value);
+               if (retval != ERROR_OK)
+                       return retval;
 
                retval = stm32x_wait_status_busy(bank, 5);
                if (retval != ERROR_OK)
                        return retval;
        }
 
-       target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
-
-       return ERROR_OK;
+       return target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
 }
 
 static int stm32x_probe(struct flash_bank *bank)
@@ -654,12 +798,16 @@ static int stm32x_probe(struct flash_bank *bank)
        stm32x_info->probed = 0;
 
        /* read stm32 device id register */
-       target_read_u32(target, 0xE0042000, &device_id);
+       int retval = target_read_u32(target, 0xE0042000, &device_id);
+       if (retval != ERROR_OK)
+               return retval;
        LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
 
-       /* get flash size from target */
-       if (target_read_u16(target, 0x1FFFF7E0, &num_pages) != ERROR_OK)
+       /* get flash size from target. */
+       retval = target_read_u16(target, 0x1FFFF7E0, &num_pages);
+       if (retval != ERROR_OK)
        {
+               LOG_WARNING("failed reading flash size, default to max target family");
                /* failed reading flash size, default to max target family */
                num_pages = 0xffff;
        }
@@ -796,7 +944,9 @@ static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
        int printed;
 
        /* read stm32 device id register */
-       target_read_u32(target, 0xE0042000, &device_id);
+       int retval = target_read_u32(target, 0xE0042000, &device_id);
+       if (retval != ERROR_OK)
+               return retval;
 
        if ((device_id & 0x7ff) == 0x410)
        {
@@ -1034,7 +1184,9 @@ COMMAND_HANDLER(stm32x_handle_options_read_command)
                return ERROR_TARGET_NOT_HALTED;
        }
 
-       target_read_u32(target, STM32_FLASH_OBR, &optionbyte);
+       retval = target_read_u32(target, STM32_FLASH_OBR, &optionbyte);
+       if (retval != ERROR_OK)
+               return retval;
        command_print(CMD_CTX, "Option Byte: 0x%" PRIx32 "", optionbyte);
 
        if (buf_get_u32((uint8_t*)&optionbyte, OPT_ERROR, 1))
@@ -1156,18 +1308,28 @@ static int stm32x_mass_erase(struct flash_bank *bank)
        }
 
        /* unlock option flash registers */
-       target_write_u32(target, STM32_FLASH_KEYR, KEY1);
-       target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+       int retval = target_write_u32(target, STM32_FLASH_KEYR, KEY1);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+       if (retval != ERROR_OK)
+               return retval;
 
        /* mass erase flash memory */
-       target_write_u32(target, STM32_FLASH_CR, FLASH_MER);
-       target_write_u32(target, STM32_FLASH_CR, FLASH_MER | FLASH_STRT);
+       retval = target_write_u32(target, STM32_FLASH_CR, FLASH_MER);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = target_write_u32(target, STM32_FLASH_CR, FLASH_MER | FLASH_STRT);
+       if (retval != ERROR_OK)
+               return retval;
 
-       int retval = stm32x_wait_status_busy(bank, 100);
+       retval = stm32x_wait_status_busy(bank, 100);
        if (retval != ERROR_OK)
                return retval;
 
-       target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
+       retval = target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
+       if (retval != ERROR_OK)
+               return retval;
 
        return ERROR_OK;
 }
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)