stm32x_info = bank->driver_priv;
/* read current option bytes */
- target_read_u32(target, STM32_FLASH_OBR, &optiondata);
+ int retval = target_read_u32(target, STM32_FLASH_OBR, &optiondata);
+ if (retval != ERROR_OK)
+ return retval;
stm32x_info->option_bytes.user_options = (uint16_t)0xFFF8 | ((optiondata >> 2) & 0x07);
stm32x_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
LOG_INFO("Device Security Bit Set");
/* each bit refers to a 4bank protection */
- target_read_u32(target, STM32_FLASH_WRPR, &optiondata);
+ retval = target_read_u32(target, STM32_FLASH_WRPR, &optiondata);
+ if (retval != ERROR_OK)
+ return retval;
stm32x_info->option_bytes.protection[0] = (uint16_t)optiondata;
stm32x_info->option_bytes.protection[1] = (uint16_t)(optiondata >> 8);
stm32x_read_options(bank);
/* unlock flash registers */
- target_write_u32(target, STM32_FLASH_KEYR, KEY1);
- target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+ int retval = target_write_u32(target, STM32_FLASH_KEYR, KEY1);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+ if (retval != ERROR_OK)
+ return retval;
/* unlock option flash registers */
- target_write_u32(target, STM32_FLASH_OPTKEYR, KEY1);
- target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2);
+ retval = target_write_u32(target, STM32_FLASH_OPTKEYR, KEY1);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2);
+ if (retval != ERROR_OK)
+ return retval;
/* erase option bytes */
- target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE);
- target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
+ retval = target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
+ if (retval != ERROR_OK)
+ return retval;
- int retval = stm32x_wait_status_busy(bank, 10);
+ retval = stm32x_wait_status_busy(bank, 10);
if (retval != ERROR_OK)
return retval;
stm32x_info = bank->driver_priv;
/* unlock flash registers */
- target_write_u32(target, STM32_FLASH_KEYR, KEY1);
- target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+ int retval = target_write_u32(target, STM32_FLASH_KEYR, KEY1);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+ if (retval != ERROR_OK)
+ return retval;
/* unlock option flash registers */
- target_write_u32(target, STM32_FLASH_OPTKEYR, KEY1);
- target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2);
+ retval = target_write_u32(target, STM32_FLASH_OPTKEYR, KEY1);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2);
+ if (retval != ERROR_OK)
+ return retval;
/* program option bytes */
- target_write_u32(target, STM32_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE);
+ retval = target_write_u32(target, STM32_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE);
+ if (retval != ERROR_OK)
+ return retval;
/* write user option byte */
- target_write_u16(target, STM32_OB_USER, stm32x_info->option_bytes.user_options);
+ retval = target_write_u16(target, STM32_OB_USER, stm32x_info->option_bytes.user_options);
+ if (retval != ERROR_OK)
+ return retval;
- int retval = stm32x_wait_status_busy(bank, 10);
+ retval = stm32x_wait_status_busy(bank, 10);
if (retval != ERROR_OK)
return retval;
/* write protection byte 1 */
- target_write_u16(target, STM32_OB_WRP0, stm32x_info->option_bytes.protection[0]);
+ retval = target_write_u16(target, STM32_OB_WRP0, stm32x_info->option_bytes.protection[0]);
+ if (retval != ERROR_OK)
+ return retval;
retval = stm32x_wait_status_busy(bank, 10);
if (retval != ERROR_OK)
return retval;
/* write protection byte 2 */
- target_write_u16(target, STM32_OB_WRP1, stm32x_info->option_bytes.protection[1]);
+ retval = target_write_u16(target, STM32_OB_WRP1, stm32x_info->option_bytes.protection[1]);
+ if (retval != ERROR_OK)
+ return retval;
retval = stm32x_wait_status_busy(bank, 10);
if (retval != ERROR_OK)
return retval;
/* write protection byte 3 */
- target_write_u16(target, STM32_OB_WRP2, stm32x_info->option_bytes.protection[2]);
+ retval = target_write_u16(target, STM32_OB_WRP2, stm32x_info->option_bytes.protection[2]);
+ if (retval != ERROR_OK)
+ return retval;
retval = stm32x_wait_status_busy(bank, 10);
if (retval != ERROR_OK)
return retval;
/* write protection byte 4 */
- target_write_u16(target, STM32_OB_WRP3, stm32x_info->option_bytes.protection[3]);
+ retval = target_write_u16(target, STM32_OB_WRP3, stm32x_info->option_bytes.protection[3]);
+ if (retval != ERROR_OK)
+ return retval;
retval = stm32x_wait_status_busy(bank, 10);
if (retval != ERROR_OK)
return retval;
/* write readout protection bit */
- target_write_u16(target, STM32_OB_RDP, stm32x_info->option_bytes.RDP);
+ retval = target_write_u16(target, STM32_OB_RDP, stm32x_info->option_bytes.RDP);
+ if (retval != ERROR_OK)
+ return retval;
retval = stm32x_wait_status_busy(bank, 10);
if (retval != ERROR_OK)
return retval;
- target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
+ retval = target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
+ if (retval != ERROR_OK)
+ return retval;
return ERROR_OK;
}
/* medium density - each bit refers to a 4bank protection
* high density - each bit refers to a 2bank protection */
- target_read_u32(target, STM32_FLASH_WRPR, &protection);
+ int retval = target_read_u32(target, STM32_FLASH_WRPR, &protection);
+ if (retval != ERROR_OK)
+ return retval;
/* medium density - each protection bit is for 4 * 1K pages
* high density - each protection bit is for 2 * 2K pages */
}
/* unlock flash registers */
- target_write_u32(target, STM32_FLASH_KEYR, KEY1);
- target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+ int retval = target_write_u32(target, STM32_FLASH_KEYR, KEY1);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+ if (retval != ERROR_OK)
+ return retval;
for (i = first; i <= last; i++)
{
- target_write_u32(target, STM32_FLASH_CR, FLASH_PER);
- target_write_u32(target, STM32_FLASH_AR, bank->base + bank->sectors[i].offset);
- target_write_u32(target, STM32_FLASH_CR, FLASH_PER | FLASH_STRT);
+ retval = target_write_u32(target, STM32_FLASH_CR, FLASH_PER);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = target_write_u32(target, STM32_FLASH_AR, bank->base + bank->sectors[i].offset);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = target_write_u32(target, STM32_FLASH_CR, FLASH_PER | FLASH_STRT);
+ if (retval != ERROR_OK)
+ return retval;
- int retval = stm32x_wait_status_busy(bank, 100);
+ retval = stm32x_wait_status_busy(bank, 100);
if (retval != ERROR_OK)
return retval;
bank->sectors[i].is_erased = 1;
}
- target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
+ retval = target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
+ if (retval != ERROR_OK)
+ return retval;
return ERROR_OK;
}
/* medium density - each bit refers to a 4bank protection
* high density - each bit refers to a 2bank protection */
- target_read_u32(target, STM32_FLASH_WRPR, &protection);
+ int retval = target_read_u32(target, STM32_FLASH_WRPR, &protection);
+ if (retval != ERROR_OK)
+ return retval;
prot_reg[0] = (uint16_t)protection;
prot_reg[1] = (uint16_t)(protection >> 8);
}
/* unlock flash registers */
- target_write_u32(target, STM32_FLASH_KEYR, KEY1);
- target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+ retval = target_write_u32(target, STM32_FLASH_KEYR, KEY1);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+ if (retval != ERROR_OK)
+ return retval;
/* multiple half words (2-byte) to be programmed? */
if (words_remaining > 0)
}
}
+ if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
+ return retval;
+
while (words_remaining > 0)
{
uint16_t value;
memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
- target_write_u32(target, STM32_FLASH_CR, FLASH_PG);
- target_write_u16(target, address, value);
+ retval = target_write_u32(target, STM32_FLASH_CR, FLASH_PG);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = target_write_u16(target, address, value);
+ if (retval != ERROR_OK)
+ return retval;
retval = stm32x_wait_status_busy(bank, 5);
if (retval != ERROR_OK)
uint16_t value = 0xffff;
memcpy(&value, buffer + bytes_written, bytes_remaining);
- target_write_u32(target, STM32_FLASH_CR, FLASH_PG);
- target_write_u16(target, address, value);
+ retval = target_write_u32(target, STM32_FLASH_CR, FLASH_PG);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = target_write_u16(target, address, value);
+ if (retval != ERROR_OK)
+ return retval;
retval = stm32x_wait_status_busy(bank, 5);
if (retval != ERROR_OK)
return retval;
}
- target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
-
- return ERROR_OK;
+ return target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
}
static int stm32x_probe(struct flash_bank *bank)
stm32x_info->probed = 0;
/* read stm32 device id register */
- target_read_u32(target, 0xE0042000, &device_id);
+ int retval = target_read_u32(target, 0xE0042000, &device_id);
+ if (retval != ERROR_OK)
+ return retval;
LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
- /* get flash size from target */
- if (target_read_u16(target, 0x1FFFF7E0, &num_pages) != ERROR_OK)
+ /* get flash size from target. */
+ retval = target_read_u16(target, 0x1FFFF7E0, &num_pages);
+ if (retval != ERROR_OK)
{
+ LOG_WARNING("failed reading flash size, default to max target family");
/* failed reading flash size, default to max target family */
num_pages = 0xffff;
}
int printed;
/* read stm32 device id register */
- target_read_u32(target, 0xE0042000, &device_id);
+ int retval = target_read_u32(target, 0xE0042000, &device_id);
+ if (retval != ERROR_OK)
+ return retval;
if ((device_id & 0x7ff) == 0x410)
{
return ERROR_TARGET_NOT_HALTED;
}
- target_read_u32(target, STM32_FLASH_OBR, &optionbyte);
+ retval = target_read_u32(target, STM32_FLASH_OBR, &optionbyte);
+ if (retval != ERROR_OK)
+ return retval;
command_print(CMD_CTX, "Option Byte: 0x%" PRIx32 "", optionbyte);
if (buf_get_u32((uint8_t*)&optionbyte, OPT_ERROR, 1))
}
/* unlock option flash registers */
- target_write_u32(target, STM32_FLASH_KEYR, KEY1);
- target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+ int retval = target_write_u32(target, STM32_FLASH_KEYR, KEY1);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = target_write_u32(target, STM32_FLASH_KEYR, KEY2);
+ if (retval != ERROR_OK)
+ return retval;
/* mass erase flash memory */
- target_write_u32(target, STM32_FLASH_CR, FLASH_MER);
- target_write_u32(target, STM32_FLASH_CR, FLASH_MER | FLASH_STRT);
+ retval = target_write_u32(target, STM32_FLASH_CR, FLASH_MER);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = target_write_u32(target, STM32_FLASH_CR, FLASH_MER | FLASH_STRT);
+ if (retval != ERROR_OK)
+ return retval;
- int retval = stm32x_wait_status_busy(bank, 100);
+ retval = stm32x_wait_status_busy(bank, 100);
if (retval != ERROR_OK)
return retval;
- target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
+ retval = target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
+ if (retval != ERROR_OK)
+ return retval;
return ERROR_OK;
}