#define STLINK_V1_PID (0x3744)
#define STLINK_V2_PID (0x3748)
#define STLINK_V2_1_PID (0x374B)
+#define STLINK_V2_1_NO_MSD_PID (0x3752)
/* the current implementation of the stlink limits
* 8bit read/writes to max 64 bytes. */
int swim;
/** highest supported jtag api version */
enum stlink_jtag_api_version jtag_api_max;
+ /** one bit for each feature supported. See macros STLINK_F_* */
+ uint32_t flags;
};
/** */
#define STLINK_DEBUG_APIV2_STOP_TRACE_RX 0x41
#define STLINK_DEBUG_APIV2_GET_TRACE_NB 0x42
#define STLINK_DEBUG_APIV2_SWD_SET_FREQ 0x43
+#define STLINK_DEBUG_APIV2_JTAG_SET_FREQ 0x44
+
+#define STLINK_DEBUG_APIV2_READMEM_16BIT 0x47
+#define STLINK_DEBUG_APIV2_WRITEMEM_16BIT 0x48
#define STLINK_DEBUG_APIV2_DRIVE_NRST_LOW 0x00
#define STLINK_DEBUG_APIV2_DRIVE_NRST_HIGH 0x01
#define STLINK_TRACE_SIZE 4096
#define STLINK_TRACE_MAX_HZ 2000000
-#define STLINK_TRACE_MIN_VERSION 13
/** */
enum stlink_mode {
#define REQUEST_SENSE 0x03
#define REQUEST_SENSE_LENGTH 18
-static const struct {
+/*
+ * Map the relevant features, quirks and workaround for specific firmware
+ * version of stlink
+ */
+#define STLINK_F_HAS_TRACE (1UL << 0)
+#define STLINK_F_HAS_SWD_SET_FREQ (1UL << 1)
+
+/* aliases */
+#define STLINK_F_HAS_TARGET_VOLT STLINK_F_HAS_TRACE
+
+struct speed_map {
int speed;
int speed_divisor;
-} stlink_khz_to_speed_map[] = {
+};
+
+/* SWD clock speed */
+static const struct speed_map stlink_khz_to_speed_map_swd[] = {
{4000, 0},
{1800, 1}, /* default */
{1200, 2},
{5, 798}
};
+/* JTAG clock speed */
+static const struct speed_map stlink_khz_to_speed_map_jtag[] = {
+ {18000, 2},
+ {9000, 4},
+ {4500, 8},
+ {2250, 16},
+ {1125, 32}, /* default */
+ {562, 64},
+ {281, 128},
+ {140, 256}
+};
+
static void stlink_usb_init_buffer(void *handle, uint8_t direction, uint32_t size);
static int stlink_swim_status(void *handle);
assert(handle != NULL);
- assert(h->version.stlink >= 2);
+ assert(h->version.flags & STLINK_F_HAS_TRACE);
if (jtag_libusb_bulk_read(h->fd, h->trace_ep, (char *)buf,
size, STLINK_READ_TIMEOUT) != size) {
static int stlink_usb_version(void *handle)
{
int res;
+ uint32_t flags;
uint16_t v;
struct stlink_usb_handle_s *h = handle;
h->vid = buf_get_u32(h->databuf, 16, 16);
h->pid = buf_get_u32(h->databuf, 32, 16);
- /* set the supported jtag api version
- * API V2 is supported since JTAG V11
- */
- if (h->version.jtag >= 11)
+ flags = 0;
+ switch (h->version.stlink) {
+ case 1:
+ /* ST-LINK/V1 from J11 switch to api-v2 (and support SWD) */
+ if (h->version.jtag >= 11)
+ h->version.jtag_api_max = STLINK_JTAG_API_V2;
+ else
+ h->version.jtag_api_max = STLINK_JTAG_API_V1;
+
+ break;
+ case 2:
+ /* all ST-LINK/V2 and ST-Link/V2.1 use api-v2 */
h->version.jtag_api_max = STLINK_JTAG_API_V2;
- else
- h->version.jtag_api_max = STLINK_JTAG_API_V1;
+
+ /* API for trace from J13 */
+ /* API for target voltage from J13 */
+ if (h->version.jtag >= 13)
+ flags |= STLINK_F_HAS_TRACE;
+
+ /* API to set SWD frequency from J22 */
+ if (h->version.jtag >= 22)
+ flags |= STLINK_F_HAS_SWD_SET_FREQ;
+
+ break;
+ default:
+ break;
+ }
+ h->version.flags = flags;
LOG_INFO("STLINK v%d JTAG v%d API v%d SWIM v%d VID 0x%04X PID 0x%04X",
h->version.stlink,
struct stlink_usb_handle_s *h = handle;
uint32_t adc_results[2];
- /* only supported by stlink/v2 and for firmware >= 13 */
- if (h->version.stlink == 1 || h->version.jtag < 13)
+ /* no error message, simply quit with error */
+ if (!(h->version.flags & STLINK_F_HAS_TARGET_VOLT))
return ERROR_COMMAND_NOTFOUND;
stlink_usb_init_buffer(handle, h->rx_ep, 8);
assert(handle != NULL);
- /* only supported by stlink/v2 and for firmware >= 22 */
- if (h->version.stlink == 1 || h->version.jtag < 22)
+ if (!(h->version.flags & STLINK_F_HAS_SWD_SET_FREQ))
return ERROR_COMMAND_NOTFOUND;
stlink_usb_init_buffer(handle, h->rx_ep, 2);
return ERROR_OK;
}
+static int stlink_usb_set_jtagclk(void *handle, uint16_t clk_divisor)
+{
+ struct stlink_usb_handle_s *h = handle;
+
+ assert(handle != NULL);
+
+ /* only supported by stlink/v2 and for firmware >= 24 */
+ if (h->version.stlink == 1 || h->version.jtag < 24)
+ return ERROR_COMMAND_NOTFOUND;
+
+ stlink_usb_init_buffer(handle, h->rx_ep, 2);
+
+ h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
+ h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_JTAG_SET_FREQ;
+ h_u16_to_le(h->cmdbuf+h->cmdidx, clk_divisor);
+ h->cmdidx += 2;
+
+ int result = stlink_cmd_allow_retry(handle, h->databuf, 2);
+
+ if (result != ERROR_OK)
+ return result;
+
+ return ERROR_OK;
+}
+
/** */
static int stlink_usb_current_mode(void *handle, uint8_t *mode)
{
assert(handle != NULL);
- if (h->trace.enabled && h->version.jtag >= STLINK_TRACE_MIN_VERSION) {
+ if (h->trace.enabled && (h->version.flags & STLINK_F_HAS_TRACE)) {
int res;
stlink_usb_init_buffer(handle, h->rx_ep, 10);
assert(handle != NULL);
- assert(h->version.jtag >= STLINK_TRACE_MIN_VERSION);
+ assert(h->version.flags & STLINK_F_HAS_TRACE);
LOG_DEBUG("Tracing: disable");
assert(handle != NULL);
- if (h->version.jtag >= STLINK_TRACE_MIN_VERSION) {
+ if (h->version.flags & STLINK_F_HAS_TRACE) {
stlink_usb_init_buffer(handle, h->rx_ep, 10);
h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
return stlink_usb_get_rw_status(handle);
}
+/** */
+static int stlink_usb_read_mem16(void *handle, uint32_t addr, uint16_t len,
+ uint8_t *buffer)
+{
+ int res;
+ struct stlink_usb_handle_s *h = handle;
+
+ assert(handle != NULL);
+
+ /* only supported by stlink/v2 and for firmware >= 26 */
+ if (h->jtag_api == STLINK_JTAG_API_V1 ||
+ (h->jtag_api == STLINK_JTAG_API_V2 && h->version.jtag < 26))
+ return ERROR_COMMAND_NOTFOUND;
+
+ /* data must be a multiple of 2 and half-word aligned */
+ if (len % 2 || addr % 2) {
+ LOG_DEBUG("Invalid data alignment");
+ return ERROR_TARGET_UNALIGNED_ACCESS;
+ }
+
+ stlink_usb_init_buffer(handle, h->rx_ep, len);
+
+ h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
+ h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_READMEM_16BIT;
+ h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
+ h->cmdidx += 4;
+ h_u16_to_le(h->cmdbuf+h->cmdidx, len);
+ h->cmdidx += 2;
+
+ res = stlink_usb_xfer(handle, h->databuf, len);
+
+ if (res != ERROR_OK)
+ return res;
+
+ memcpy(buffer, h->databuf, len);
+
+ return stlink_usb_get_rw_status(handle);
+}
+
+/** */
+static int stlink_usb_write_mem16(void *handle, uint32_t addr, uint16_t len,
+ const uint8_t *buffer)
+{
+ int res;
+ struct stlink_usb_handle_s *h = handle;
+
+ assert(handle != NULL);
+
+ /* only supported by stlink/v2 and for firmware >= 26 */
+ if (h->jtag_api == STLINK_JTAG_API_V1 ||
+ (h->jtag_api == STLINK_JTAG_API_V2 && h->version.jtag < 26))
+ return ERROR_COMMAND_NOTFOUND;
+
+ /* data must be a multiple of 2 and half-word aligned */
+ if (len % 2 || addr % 2) {
+ LOG_DEBUG("Invalid data alignment");
+ return ERROR_TARGET_UNALIGNED_ACCESS;
+ }
+
+ stlink_usb_init_buffer(handle, h->tx_ep, len);
+
+ h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
+ h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_WRITEMEM_16BIT;
+ h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
+ h->cmdidx += 4;
+ h_u16_to_le(h->cmdbuf+h->cmdidx, len);
+ h->cmdidx += 2;
+
+ res = stlink_usb_xfer(handle, buffer, len);
+
+ if (res != ERROR_OK)
+ return res;
+
+ return stlink_usb_get_rw_status(handle);
+}
+
/** */
static int stlink_usb_read_mem32(void *handle, uint32_t addr, uint16_t len,
uint8_t *buffer)
/* calculate byte count */
count *= size;
+ /* switch to 8 bit if stlink does not support 16 bit memory read */
+ if (size == 2 && (h->jtag_api == STLINK_JTAG_API_V1 ||
+ (h->jtag_api == STLINK_JTAG_API_V2 && h->version.jtag < 26)))
+ size = 1;
+
while (count) {
- bytes_remaining = (size == 4) ? \
+ bytes_remaining = (size != 1) ? \
stlink_max_block_size(h->max_mem_packet, addr) : STLINK_MAX_RW8;
if (count < bytes_remaining)
if (retval != ERROR_OK)
return retval;
} else
- /* the stlink only supports 8/32bit memory read/writes
- * honour 32bit, all others will be handled as 8bit access */
- if (size == 4) {
+ /*
+ * all stlink support 8/32bit memory read/writes and only from
+ * stlink V2J26 there is support for 16 bit memory read/write.
+ * Honour 32 bit and, if possible, 16 bit too. Otherwise, handle
+ * as 8bit access.
+ */
+ if (size != 1) {
- /* When in jtag mode the stlink uses the auto-increment functinality.
+ /* When in jtag mode the stlink uses the auto-increment functionality.
* However it expects us to pass the data correctly, this includes
* alignment and any page boundaries. We already do this as part of the
* adi_v5 implementation, but the stlink is a hla adapter and so this
- * needs implementiong manually.
+ * needs implementing manually.
* currently this only affects jtag mode, according to ST they do single
* access in SWD mode - but this may change and so we do it for both modes */
/* we first need to check for any unaligned bytes */
- if (addr % 4) {
+ if (addr & (size - 1)) {
- uint32_t head_bytes = 4 - (addr % 4);
+ uint32_t head_bytes = size - (addr & (size - 1));
retval = stlink_usb_read_mem8(handle, addr, head_bytes, buffer);
if (retval == ERROR_WAIT && retries < MAX_WAIT_RETRIES) {
usleep((1<<retries++) * 1000);
bytes_remaining -= head_bytes;
}
- if (bytes_remaining % 4)
+ if (bytes_remaining & (size - 1))
retval = stlink_usb_read_mem(handle, addr, 1, bytes_remaining, buffer);
+ else if (size == 2)
+ retval = stlink_usb_read_mem16(handle, addr, bytes_remaining, buffer);
else
retval = stlink_usb_read_mem32(handle, addr, bytes_remaining, buffer);
} else
/* calculate byte count */
count *= size;
+ /* switch to 8 bit if stlink does not support 16 bit memory read */
+ if (size == 2 && (h->jtag_api == STLINK_JTAG_API_V1 ||
+ (h->jtag_api == STLINK_JTAG_API_V2 && h->version.jtag < 26)))
+ size = 1;
+
while (count) {
- bytes_remaining = (size == 4) ? \
+ bytes_remaining = (size != 1) ? \
stlink_max_block_size(h->max_mem_packet, addr) : STLINK_MAX_RW8;
if (count < bytes_remaining)
if (retval != ERROR_OK)
return retval;
} else
- /* the stlink only supports 8/32bit memory read/writes
- * honour 32bit, all others will be handled as 8bit access */
- if (size == 4) {
+ /*
+ * all stlink support 8/32bit memory read/writes and only from
+ * stlink V2J26 there is support for 16 bit memory read/write.
+ * Honour 32 bit and, if possible, 16 bit too. Otherwise, handle
+ * as 8bit access.
+ */
+ if (size != 1) {
- /* When in jtag mode the stlink uses the auto-increment functinality.
+ /* When in jtag mode the stlink uses the auto-increment functionality.
* However it expects us to pass the data correctly, this includes
* alignment and any page boundaries. We already do this as part of the
* adi_v5 implementation, but the stlink is a hla adapter and so this
- * needs implementiong manually.
+ * needs implementing manually.
* currently this only affects jtag mode, according to ST they do single
* access in SWD mode - but this may change and so we do it for both modes */
/* we first need to check for any unaligned bytes */
- if (addr % 4) {
+ if (addr & (size - 1)) {
- uint32_t head_bytes = 4 - (addr % 4);
+ uint32_t head_bytes = size - (addr & (size - 1));
retval = stlink_usb_write_mem8(handle, addr, head_bytes, buffer);
if (retval == ERROR_WAIT && retries < MAX_WAIT_RETRIES) {
usleep((1<<retries++) * 1000);
bytes_remaining -= head_bytes;
}
- if (bytes_remaining % 4)
+ if (bytes_remaining & (size - 1))
retval = stlink_usb_write_mem(handle, addr, 1, bytes_remaining, buffer);
+ else if (size == 2)
+ retval = stlink_usb_write_mem16(handle, addr, bytes_remaining, buffer);
else
retval = stlink_usb_write_mem32(handle, addr, bytes_remaining, buffer);
return !strcmp(targetname, "cortex_m");
}
-static int stlink_speed(void *handle, int khz, bool query)
+static int stlink_speed_swim(void *handle, int khz, bool query)
{
- unsigned i;
- int speed_index = -1;
- int speed_diff = INT_MAX;
- struct stlink_usb_handle_s *h = handle;
-
- if (h && (h->transport == HL_TRANSPORT_SWIM)) {
- /*
+ /*
we dont care what the khz rate is
we only have low and high speed...
before changing speed the SWIM_CSR HS bit
must be updated
- */
- if (khz == 0)
- stlink_swim_speed(handle, 0);
- else
- stlink_swim_speed(handle, 1);
- return khz;
- }
+ */
+ if (khz == 0)
+ stlink_swim_speed(handle, 0);
+ else
+ stlink_swim_speed(handle, 1);
+ return khz;
+}
- /* only supported by stlink/v2 and for firmware >= 22 */
- if (h && (h->version.stlink == 1 || h->version.jtag < 22))
- return khz;
+static int stlink_match_speed_map(const struct speed_map *map, unsigned int map_size, int khz, bool query)
+{
+ unsigned int i;
+ int speed_index = -1;
+ int speed_diff = INT_MAX;
+ bool match = true;
- for (i = 0; i < ARRAY_SIZE(stlink_khz_to_speed_map); i++) {
- if (khz == stlink_khz_to_speed_map[i].speed) {
+ for (i = 0; i < map_size; i++) {
+ if (khz == map[i].speed) {
speed_index = i;
break;
} else {
- int current_diff = khz - stlink_khz_to_speed_map[i].speed;
+ int current_diff = khz - map[i].speed;
/* get abs value for comparison */
current_diff = (current_diff > 0) ? current_diff : -current_diff;
- if ((current_diff < speed_diff) && khz >= stlink_khz_to_speed_map[i].speed) {
+ if ((current_diff < speed_diff) && khz >= map[i].speed) {
speed_diff = current_diff;
speed_index = i;
}
}
}
- bool match = true;
-
if (speed_index == -1) {
/* this will only be here if we cannot match the slow speed.
* use the slowest speed we support.*/
- speed_index = ARRAY_SIZE(stlink_khz_to_speed_map) - 1;
+ speed_index = map_size - 1;
match = false;
- } else if (i == ARRAY_SIZE(stlink_khz_to_speed_map))
+ } else if (i == map_size)
match = false;
if (!match && query) {
LOG_INFO("Unable to match requested speed %d kHz, using %d kHz", \
- khz, stlink_khz_to_speed_map[speed_index].speed);
+ khz, map[speed_index].speed);
}
- if (h && !query) {
- int result = stlink_usb_set_swdclk(h, stlink_khz_to_speed_map[speed_index].speed_divisor);
+ return speed_index;
+}
+
+static int stlink_speed_swd(void *handle, int khz, bool query)
+{
+ int speed_index;
+ struct stlink_usb_handle_s *h = handle;
+
+ /* old firmware cannot change it */
+ if (!(h->version.flags & STLINK_F_HAS_SWD_SET_FREQ))
+ return khz;
+
+ speed_index = stlink_match_speed_map(stlink_khz_to_speed_map_swd,
+ ARRAY_SIZE(stlink_khz_to_speed_map_swd), khz, query);
+
+ if (!query) {
+ int result = stlink_usb_set_swdclk(h, stlink_khz_to_speed_map_swd[speed_index].speed_divisor);
+ if (result != ERROR_OK) {
+ LOG_ERROR("Unable to set adapter speed");
+ return khz;
+ }
+ }
+
+ return stlink_khz_to_speed_map_swd[speed_index].speed;
+}
+
+static int stlink_speed_jtag(void *handle, int khz, bool query)
+{
+ int speed_index;
+ struct stlink_usb_handle_s *h = handle;
+
+ /* only supported by stlink/v2 and for firmware >= 24 */
+ if (h->version.stlink == 1 || h->version.jtag < 24)
+ return khz;
+
+ speed_index = stlink_match_speed_map(stlink_khz_to_speed_map_jtag,
+ ARRAY_SIZE(stlink_khz_to_speed_map_jtag), khz, query);
+
+ if (!query) {
+ int result = stlink_usb_set_jtagclk(h, stlink_khz_to_speed_map_jtag[speed_index].speed_divisor);
if (result != ERROR_OK) {
LOG_ERROR("Unable to set adapter speed");
return khz;
}
}
- return stlink_khz_to_speed_map[speed_index].speed;
+ return stlink_khz_to_speed_map_jtag[speed_index].speed;
+}
+
+void stlink_dump_speed_map(const struct speed_map *map, unsigned int map_size)
+{
+ unsigned int i;
+
+ LOG_DEBUG("Supported clock speeds are:");
+ for (i = 0; i < map_size; i++)
+ LOG_DEBUG("%d kHz", map[i].speed);
+}
+
+static int stlink_speed(void *handle, int khz, bool query)
+{
+ struct stlink_usb_handle_s *h = handle;
+
+ if (!handle)
+ return khz;
+
+ if (h->transport == HL_TRANSPORT_SWIM)
+ return stlink_speed_swim(handle, khz, query);
+ else if (h->transport == HL_TRANSPORT_SWD)
+ return stlink_speed_swd(handle, khz, query);
+ else if (h->transport == HL_TRANSPORT_JTAG)
+ return stlink_speed_jtag(handle, khz, query);
+
+ return khz;
}
/** */
case STLINK_V1_PID:
h->version.stlink = 1;
h->tx_ep = STLINK_TX_EP;
- h->trace_ep = STLINK_TRACE_EP;
break;
case STLINK_V2_1_PID:
+ case STLINK_V2_1_NO_MSD_PID:
h->version.stlink = 2;
h->tx_ep = STLINK_V2_1_TX_EP;
h->trace_ep = STLINK_V2_1_TRACE_EP;
switch (h->transport) {
case HL_TRANSPORT_SWD:
+ if (h->version.jtag_api_max == STLINK_JTAG_API_V1)
+ err = ERROR_FAIL;
+ /* fall-through */
case HL_TRANSPORT_JTAG:
if (h->version.jtag == 0)
err = ERROR_FAIL;
return ERROR_OK;
}
- /* clock speed only supported by stlink/v2 and for firmware >= 22 */
- if (h->version.stlink >= 2 && h->version.jtag >= 22) {
- LOG_DEBUG("Supported clock speeds are:");
-
- for (unsigned i = 0; i < ARRAY_SIZE(stlink_khz_to_speed_map); i++)
- LOG_DEBUG("%d kHz", stlink_khz_to_speed_map[i].speed);
-
- stlink_speed(h, param->initial_interface_speed, false);
+ if (h->transport == HL_TRANSPORT_JTAG) {
+ /* jtag clock speed only supported by stlink/v2 and for firmware >= 24 */
+ if (h->version.stlink >= 2 && h->version.jtag >= 24) {
+ stlink_dump_speed_map(stlink_khz_to_speed_map_jtag, ARRAY_SIZE(stlink_khz_to_speed_map_jtag));
+ stlink_speed(h, param->initial_interface_speed, false);
+ }
+ } else if (h->transport == HL_TRANSPORT_SWD) {
+ if (h->version.flags & STLINK_F_HAS_SWD_SET_FREQ) {
+ stlink_dump_speed_map(stlink_khz_to_speed_map_swd, ARRAY_SIZE(stlink_khz_to_speed_map_swd));
+ stlink_speed(h, param->initial_interface_speed, false);
+ }
}
/* get cpuid, so we can determine the max page size
return ERROR_FAIL;
}
-int stlink_config_trace(void *handle, bool enabled, enum tpio_pin_protocol pin_protocol,
+int stlink_config_trace(void *handle, bool enabled, enum tpiu_pin_protocol pin_protocol,
uint32_t port_size, unsigned int *trace_freq)
{
struct stlink_usb_handle_s *h = handle;
- if (enabled && (h->jtag_api < 2 || pin_protocol != ASYNC_UART)) {
+ if (enabled && (!(h->version.flags & STLINK_F_HAS_TRACE) ||
+ pin_protocol != TPIU_PIN_PROTOCOL_ASYNC_UART)) {
LOG_ERROR("The attached ST-LINK version doesn't support this trace mode");
return ERROR_FAIL;
}