+int jtag_init_reset(struct command_context_s *cmd_ctx)
+{
+ int retval;
+
+ if ((retval=jtag_interface_init(cmd_ctx)) != ERROR_OK)
+ return retval;
+
+ LOG_DEBUG("Trying to bring the JTAG controller to life by asserting TRST / TLR");
+
+ /* Reset can happen after a power cycle.
+ *
+ * Ideally we would only assert TRST or run TLR before the target reset.
+ *
+ * However w/srst_pulls_trst, trst is asserted together with the target
+ * reset whether we want it or not.
+ *
+ * NB! Some targets have JTAG circuitry disabled until a
+ * trst & srst has been asserted.
+ *
+ * NB! here we assume nsrst/ntrst delay are sufficient!
+ *
+ * NB! order matters!!!! srst *can* disconnect JTAG circuitry
+ *
+ */
+ jtag_add_reset(1, 0); /* TLR or TRST */
+ if (jtag_reset_config & RESET_HAS_SRST)
+ {
+ jtag_add_reset(1, 1);
+ if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
+ jtag_add_reset(0, 1);
+ }
+ jtag_add_reset(0, 0);
+ if ((retval = jtag_execute_queue()) != ERROR_OK)
+ return retval;
+
+ /* Check that we can communication on the JTAG chain + eventually we want to
+ * be able to perform enumeration only after OpenOCD has started
+ * telnet and GDB server
+ *
+ * That would allow users to more easily perform any magic they need to before
+ * reset happens.
+ */
+ return jtag_init_inner(cmd_ctx);
+}
+
+int jtag_init(struct command_context_s *cmd_ctx)
+{
+ int retval;
+ if ((retval=jtag_interface_init(cmd_ctx)) != ERROR_OK)
+ return retval;
+ if (jtag_init_inner(cmd_ctx)==ERROR_OK)
+ {
+ return ERROR_OK;
+ }
+ return jtag_init_reset(cmd_ctx);
+}