gdb_server, target: Add target_address_bits()

[openocd.git] / src / rtos / rtos_ecos_stackings.c

diff --git a/src/rtos/rtos_ecos_stackings.c b/src/rtos/rtos_ecos_stackings.c
index 995c113894fc5cbf73d7452ae1a02f5f4741f887..ca98d9417901359f4b85e76a33deb27c7553a0a8 100644 (file)
--- a/src/rtos/rtos_ecos_stackings.c
+++ b/src/rtos/rtos_ecos_stackings.c
@@ -11,9 +11,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -21,44 +19,33 @@
 #endif
 
 #include "rtos.h"
+#include "rtos_standard_stackings.h"
+#include "target/armv7m.h"
 
-static const struct stack_register_offset rtos_eCos_Cortex_M3_stack_offsets[] = {
-       { 0x0c, 32 },       /* r0   */
-       { 0x10, 32 },       /* r1   */
-       { 0x14, 32 },       /* r2   */
-       { 0x18, 32 },       /* r3   */
-       { 0x1c, 32 },       /* r4   */
-       { 0x20, 32 },       /* r5   */
-       { 0x24, 32 },       /* r6   */
-       { 0x28, 32 },       /* r7   */
-       { 0x2c, 32 },       /* r8   */
-       { 0x30, 32 },       /* r9   */
-       { 0x34, 32 },       /* r10  */
-       { 0x38, 32 },       /* r11  */
-       { 0x3c, 32 },       /* r12  */
-       { -2,   32 },       /* sp   */
-       { -1,   32 },       /* lr   */
-       { 0x40, 32 },       /* pc   */
-       { -1,   96 },       /* FPA1 */
-       { -1,   96 },       /* FPA2 */
-       { -1,   96 },       /* FPA3 */
-       { -1,   96 },       /* FPA4 */
-       { -1,   96 },       /* FPA5 */
-       { -1,   96 },       /* FPA6 */
-       { -1,   96 },       /* FPA7 */
-       { -1,   96 },       /* FPA8 */
-       { -1,   32 },       /* FPS  */
-       { -1,   32 },       /* xPSR */
+static const struct stack_register_offset rtos_eCos_Cortex_M3_stack_offsets[ARMV7M_NUM_CORE_REGS] = {
+       { ARMV7M_R0,   0x0c, 32 },              /* r0   */
+       { ARMV7M_R1,   0x10, 32 },              /* r1   */
+       { ARMV7M_R2,   0x14, 32 },              /* r2   */
+       { ARMV7M_R3,   0x18, 32 },              /* r3   */
+       { ARMV7M_R4,   0x1c, 32 },              /* r4   */
+       { ARMV7M_R5,   0x20, 32 },              /* r5   */
+       { ARMV7M_R6,   0x24, 32 },              /* r6   */
+       { ARMV7M_R7,   0x28, 32 },              /* r7   */
+       { ARMV7M_R8,   0x2c, 32 },              /* r8   */
+       { ARMV7M_R9,   0x30, 32 },              /* r9   */
+       { ARMV7M_R10,  0x34, 32 },              /* r10  */
+       { ARMV7M_R11,  0x38, 32 },              /* r11  */
+       { ARMV7M_R12,  0x3c, 32 },              /* r12  */
+       { ARMV7M_R13,  -2,   32 },              /* sp   */
+       { ARMV7M_R14,  -1,   32 },              /* lr   */
+       { ARMV7M_PC,   0x40, 32 },              /* pc   */
+       { ARMV7M_xPSR, -1,   32 },              /* xPSR */
 };
 
-
-const struct rtos_register_stacking rtos_eCos_Cortex_M3_stacking =
-{
-       0x44,                                 /* stack_registers_size */
-       -1,                                   /* stack_growth_direction */
-       26,                                   /* num_output_registers */
-       8,                                    /* stack_alignment */
-       rtos_eCos_Cortex_M3_stack_offsets     /* register_offsets */
+const struct rtos_register_stacking rtos_eCos_Cortex_M3_stacking = {
+       0x44,                                   /* stack_registers_size */
+       -1,                                             /* stack_growth_direction */
+       ARMV7M_NUM_CORE_REGS,   /* num_output_registers */
+       rtos_generic_stack_align8,      /* stack_alignment */
+       rtos_eCos_Cortex_M3_stack_offsets       /* register_offsets */
 };
-
-