aarch64: fix handling of 'reset halt'

[openocd.git] / src / target / aarch64.c

diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index 8a8f21d13b3088aad69a75af92de61d380858a3b..e4d420f07ab688cc134a4b5d28a600280d9c6af6 100644 (file)
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -1942,7 +1942,7 @@ static int aarch64_assert_reset(struct target *target)
        else if (reset_config & RESET_HAS_SRST) {
                bool srst_asserted = false;
 
-               if (target->reset_halt) {
+               if (target->reset_halt && !(reset_config & RESET_SRST_PULLS_TRST)) {
                        if (target_was_examined(target)) {
 
                                if (reset_config & RESET_SRST_NO_GATING) {
@@ -1952,12 +1952,12 @@ static int aarch64_assert_reset(struct target *target)
                                         */
                                        adapter_assert_reset();
                                        srst_asserted = true;
-
-                                       /* make sure to clear all sticky errors */
-                                       mem_ap_write_atomic_u32(armv8->debug_ap,
-                                                       armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
                                }
 
+                               /* make sure to clear all sticky errors */
+                               mem_ap_write_atomic_u32(armv8->debug_ap,
+                                               armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
+
                                /* set up Reset Catch debug event to halt the CPU after reset */
                                retval = aarch64_enable_reset_catch(target, true);
                                if (retval != ERROR_OK)