target: fix incorrect arm cpu monitor mode encoding
[openocd.git] / src / target / arm.h
index e47640425d95273d49687cbaabef448128b0b08e..88b5902ea8d7c9ebcd907be5b3d1dd25f00c3fd5 100644 (file)
@@ -21,7 +21,7 @@
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the
  * Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  */
 
 #ifndef ARM_H
@@ -58,8 +58,8 @@ enum arm_mode {
        ARM_MODE_FIQ = 17,
        ARM_MODE_IRQ = 18,
        ARM_MODE_SVC = 19,
+       ARM_MODE_MON = 22,
        ARM_MODE_ABT = 23,
-       ARM_MODE_MON = 26,
        ARM_MODE_UND = 27,
        ARM_MODE_SYS = 31,
 
@@ -97,7 +97,7 @@ struct arm {
        /** Handle to the PC; valid in all core modes. */
        struct reg *pc;
 
-       /** Handle to the CPSR; valid in all core modes. */
+       /** Handle to the CPSR/xPSR; valid in all core modes. */
        struct reg *cpsr;
 
        /** Handle to the SPSR; valid only in core modes with an SPSR. */
@@ -211,7 +211,8 @@ extern const struct command_registration arm_command_handlers[];
 
 int arm_arch_state(struct target *target);
 int arm_get_gdb_reg_list(struct target *target,
-               struct reg **reg_list[], int *reg_list_size);
+               struct reg **reg_list[], int *reg_list_size,
+               enum target_register_class reg_class);
 
 int arm_init_arch_info(struct target *target, struct arm *arm);
 

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