aarch64: enlarge value buffer of arm_reg to store 64 bit

[openocd.git] / src / target / arm.h

diff --git a/src/target/arm.h b/src/target/arm.h
index 27636cc3df9658c0f40dd15d57dccbbf5a8782b6..e5e336dff7f3094432be3fd3d77eb00b90b02f0f 100644 (file)
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -19,13 +19,11 @@
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#ifndef ARM_H
-#define ARM_H
+#ifndef OPENOCD_TARGET_ARM_H
+#define OPENOCD_TARGET_ARM_H
 
 #include <helper/command.h>
 #include "target.h"
@@ -61,12 +59,22 @@ enum arm_mode {
        ARM_MODE_MON = 22,
        ARM_MODE_ABT = 23,
        ARM_MODE_UND = 27,
+       ARM_MODE_1176_MON = 28,
        ARM_MODE_SYS = 31,
 
        ARM_MODE_THREAD = 0,
        ARM_MODE_USER_THREAD = 1,
        ARM_MODE_HANDLER = 2,
 
+       /* shift left 4 bits for armv8 64 */
+       ARMV8_64_EL0T = 0x0F,
+       ARMV8_64_EL1T = 0x4F,
+       ARMV8_64_EL1H = 0x5F,
+       ARMV8_64_EL2T = 0x8F,
+       ARMV8_64_EL2H = 0x9F,
+       ARMV8_64_EL3T = 0xCF,
+       ARMV8_64_EL3H = 0xDF,
+
        ARM_MODE_ANY = -1
 };
 
@@ -79,6 +87,7 @@ enum arm_state {
        ARM_STATE_THUMB,
        ARM_STATE_JAZELLE,
        ARM_STATE_THUMB_EE,
+       ARM_STATE_AARCH64,
 };
 
 #define ARM_COMMON_MAGIC 0x0A450A45
@@ -131,6 +140,18 @@ struct arm {
        /** Flag reporting whether semihosting is active. */
        bool is_semihosting;
 
+       /** Flag reporting whether semihosting fileio is active. */
+       bool is_semihosting_fileio;
+
+       /** Flag reporting whether semihosting fileio operation is active. */
+       bool semihosting_hit_fileio;
+
+       /** Current semihosting operation. */
+       int semihosting_op;
+
+       /** Current semihosting result. */
+       int semihosting_result;
+
        /** Value to be returned by semihosting SYS_ERRNO request. */
        int semihosting_errno;
 
@@ -168,6 +189,18 @@ struct arm {
                        uint32_t CRn, uint32_t CRm,
                        uint32_t value);
 
+       /** Read coprocessor register.  */
+       int (*mrs)(struct target *target, uint32_t op0,
+                       uint32_t op1, uint32_t op2,
+                       uint32_t CRn, uint32_t CRm,
+                       uint32_t *value);
+
+       /** Write coprocessor register.  */
+       int (*msr)(struct target *target, uint32_t cpnum,
+                       uint32_t op1, uint32_t op2,
+                       uint32_t CRn, uint32_t CRm,
+                       uint32_t value);
+
        void *arch_info;
 
        /** For targets conforming to ARM Debug Interface v5,
@@ -202,10 +235,11 @@ struct arm_reg {
        enum arm_mode mode;
        struct target *target;
        struct arm *arm;
-       uint8_t value[4];
+       uint8_t value[8];
 };
 
 struct reg_cache *arm_build_reg_cache(struct target *target, struct arm *arm);
+struct reg_cache *armv8_build_reg_cache(struct target *target);
 
 extern const struct command_registration arm_command_handlers[];
 
@@ -213,6 +247,9 @@ int arm_arch_state(struct target *target);
 int arm_get_gdb_reg_list(struct target *target,
                struct reg **reg_list[], int *reg_list_size,
                enum target_register_class reg_class);
+int armv8_get_gdb_reg_list(struct target *target,
+               struct reg **reg_list[], int *reg_list_size,
+               enum target_register_class reg_class);
 
 int arm_init_arch_info(struct target *target, struct arm *arm);
 
@@ -220,7 +257,7 @@ int arm_init_arch_info(struct target *target, struct arm *arm);
 int armv4_5_run_algorithm(struct target *target,
                int num_mem_params, struct mem_param *mem_params,
                int num_reg_params, struct reg_param *reg_params,
-               uint32_t entry_point, uint32_t exit_point,
+               target_addr_t entry_point, target_addr_t exit_point,
                int timeout_ms, void *arch_info);
 int armv4_5_run_algorithm_inner(struct target *target,
                int num_mem_params, struct mem_param *mem_params,
@@ -231,14 +268,15 @@ int armv4_5_run_algorithm_inner(struct target *target,
                                int timeout_ms, void *arch_info));
 
 int arm_checksum_memory(struct target *target,
-               uint32_t address, uint32_t count, uint32_t *checksum);
+               target_addr_t address, uint32_t count, uint32_t *checksum);
 int arm_blank_check_memory(struct target *target,
-               uint32_t address, uint32_t count, uint32_t *blank);
+               target_addr_t address, uint32_t count, uint32_t *blank, uint8_t erased_value);
 
 void arm_set_cpsr(struct arm *arm, uint32_t cpsr);
 struct reg *arm_reg_current(struct arm *arm, unsigned regnum);
+struct reg *armv8_reg_current(struct arm *arm, unsigned regnum);
 
 extern struct reg arm_gdb_dummy_fp_reg;
 extern struct reg arm_gdb_dummy_fps_reg;
 
-#endif /* ARM_H */
+#endif /* OPENOCD_TARGET_ARM_H */