Transform 'u16' to 'uint16_t'
[openocd.git] / src / target / arm11.c
index 1ac952da9cd2d7c6c3fd5384c0c30ebf084fb605..380f2cead1e1eb2a479ef1738f30977771bfaf4e 100644 (file)
@@ -1,5 +1,6 @@
 /***************************************************************************
  *   Copyright (C) 2008 digenius technology GmbH.                          *
+ *   Michael Bruck                                                         *
  *                                                                         *
  *   Copyright (C) 2008 Oyvind Harboe oyvind.harboe@zylin.com              *
  *                                                                         *
 #endif
 
 #include "arm11.h"
-#include "jtag.h"
-#include "log.h"
+#include "target_type.h"
 
-#include <stdlib.h>
-#include <string.h>
 
 #if 0
 #define _DEBUG_INSTRUCTION_EXECUTION_
@@ -290,14 +288,14 @@ enum arm11_regcache_ids
 
 #define ARM11_GDB_REGISTER_COUNT       26
 
-u8 arm11_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+uint8_t arm11_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
 
 reg_t arm11_gdb_dummy_fp_reg =
 {
        "GDB dummy floating-point register", arm11_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0
 };
 
-u8 arm11_gdb_dummy_fps_value[] = {0, 0, 0, 0};
+uint8_t arm11_gdb_dummy_fps_value[] = {0, 0, 0, 0};
 
 reg_t arm11_gdb_dummy_fps_reg =
 {
@@ -340,7 +338,9 @@ int arm11_check_init(arm11_common_t * arm11, u32 * dscr)
                if (*dscr & ARM11_DSCR_CORE_HALTED)
                {
                        /** \todo TODO: this needs further scrutiny because
-                         * arm11_on_enter_debug_state() never gets properly called
+                         * arm11_on_enter_debug_state() never gets properly called.
+                         * As a result we don't read the actual register states from
+                         * the target.
                          */
 
                        arm11->target->state    = TARGET_HALTED;
@@ -393,8 +393,8 @@ static int arm11_on_enter_debug_state(arm11_common_t * arm11)
                scan_field_t    chain5_fields[3];
 
                arm11_setup_field(arm11, 32, NULL, &R(WDTR),    chain5_fields + 0);
-               arm11_setup_field(arm11,  1, NULL, NULL,        chain5_fields + 1);
-               arm11_setup_field(arm11,  1, NULL, NULL,        chain5_fields + 2);
+               arm11_setup_field(arm11,  1, NULL, NULL,                chain5_fields + 1);
+               arm11_setup_field(arm11,  1, NULL, NULL,                chain5_fields + 2);
 
                arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE);
        }
@@ -630,8 +630,8 @@ int arm11_leave_debug_state(arm11_common_t * arm11)
 
                scan_field_t    chain5_fields[3];
 
-               u8                      Ready           = 0;    /* ignored */
-               u8                      Valid           = 0;    /* ignored */
+               uint8_t                 Ready           = 0;    /* ignored */
+               uint8_t                 Valid           = 0;    /* ignored */
 
                arm11_setup_field(arm11, 32, &R(RDTR),  NULL, chain5_fields + 0);
                arm11_setup_field(arm11,  1, &Ready,    NULL, chain5_fields + 1);
@@ -683,7 +683,7 @@ int arm11_poll(struct target_s *target)
                        enum target_state old_state = target->state;
 
                        LOG_DEBUG("enter TARGET_HALTED");
-                       target->state           = TARGET_HALTED;
+                       target->state                   = TARGET_HALTED;
                        target->debug_reason    = arm11_get_DSCR_debug_reason(dscr);
                        arm11_on_enter_debug_state(arm11);
 
@@ -696,7 +696,7 @@ int arm11_poll(struct target_s *target)
                if (target->state != TARGET_RUNNING && target->state != TARGET_DEBUG_RUNNING)
                {
                        LOG_DEBUG("enter TARGET_RUNNING");
-                       target->state           = TARGET_RUNNING;
+                       target->state                   = TARGET_RUNNING;
                        target->debug_reason    = DBG_REASON_NOTHALTED;
                }
        }
@@ -717,7 +717,7 @@ int arm11_arch_state(struct target_s *target)
 }
 
 /* target request support */
-int arm11_target_request_data(struct target_s *target, u32 size, u8 *buffer)
+int arm11_target_request_data(struct target_s *target, u32 size, uint8_t *buffer)
 {
        FNC_INFO_NOTIMPLEMENTED;
 
@@ -1090,9 +1090,9 @@ int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], i
  * size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
  * count: number of items of <size>
  */
-int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
 {
-       /** \todo TODO: check if buffer cast to u32* and u16* might cause alignment problems */
+       /** \todo TODO: check if buffer cast to u32* and uint16_t* might cause alignment problems */
 
        FNC_INFO;
 
@@ -1148,8 +1148,8 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count,
                                /* MCR p14,0,R1,c0,c5,0 */
                                arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1);
 
-                               u16 svalue = res;
-                               memcpy(buffer + count * sizeof(u16), &svalue, sizeof(u16));
+                               uint16_t svalue = res;
+                               memcpy(buffer + count * sizeof(uint16_t), &svalue, sizeof(uint16_t));
                        }
 
                        break;
@@ -1173,7 +1173,7 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count,
        return ERROR_OK;
 }
 
-int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
 {
        FNC_INFO;
 
@@ -1218,8 +1218,8 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count
 
                        for (size_t i = 0; i < count; i++)
                        {
-                               u16 value;
-                               memcpy(&value, buffer + count * sizeof(u16), sizeof(u16));
+                               uint16_t value;
+                               memcpy(&value, buffer + count * sizeof(uint16_t), sizeof(uint16_t));
 
                                /* MRC p14,0,r1,c0,c5,0 */
                                arm11_run_instr_data_to_core1(arm11, 0xee101e15, value);
@@ -1285,7 +1285,7 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count
 
 
 /* write target memory in multiples of 4 byte, optimized for writing large quantities of data */
-int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, u8 *buffer)
+int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, uint8_t *buffer)
 {
        FNC_INFO;
 
@@ -1373,7 +1373,6 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
                        int timeout_ms, void *arch_info)
 {
                arm11_common_t *arm11 = target->arch_info;
-       armv4_5_algorithm_t *arm11_algorithm_info = arch_info;
 //     enum armv4_5_state core_state = arm11->core_state;
 //     enum armv4_5_mode core_mode = arm11->core_mode;
        u32 context[16];
@@ -1382,11 +1381,6 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
        int retval = ERROR_OK;
                LOG_DEBUG("Running algorithm");
 
-       if (arm11_algorithm_info->common_magic != ARMV4_5_COMMON_MAGIC)
-       {
-               LOG_ERROR("current target isn't an ARMV4/5 target");
-               return ERROR_TARGET_INVALID;
-       }
 
        if (target->state != TARGET_HALTED)
        {
@@ -1401,11 +1395,11 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
        // Save regs
        for (size_t i = 0; i < 16; i++)
        {
-               context[i] = buf_get_u32((u8*)(&arm11->reg_values[i]),0,32);
+               context[i] = buf_get_u32((uint8_t*)(&arm11->reg_values[i]),0,32);
                LOG_DEBUG("Save %zi: 0x%x",i,context[i]);
        }
 
-       cpsr = buf_get_u32((u8*)(arm11->reg_values+ARM11_RC_CPSR),0,32);
+       cpsr = buf_get_u32((uint8_t*)(arm11->reg_values+ARM11_RC_CPSR),0,32);
        LOG_DEBUG("Save CPSR: 0x%x", cpsr);
 
        for (int i = 0; i < num_mem_params; i++)
@@ -1445,6 +1439,12 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
                exit(-1);
        }
 */
+
+
+/* arm11 at this point only supports ARM not THUMB mode
+   however if this test needs to be reactivated the current state can be read back
+   from CPSR */
+#if 0
        if (arm11_algorithm_info->core_mode != ARMV4_5_MODE_ANY)
        {
                LOG_DEBUG("setting core_mode: 0x%2.2x", arm11_algorithm_info->core_mode);
@@ -1452,6 +1452,7 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
                arm11->reg_list[ARM11_RC_CPSR].dirty = 1;
                arm11->reg_list[ARM11_RC_CPSR].valid = 1;
        }
+#endif
 
        if ((retval = breakpoint_add(target, exit_point, exit_breakpoint_size, BKPT_HARD)) != ERROR_OK)
        {
@@ -1520,10 +1521,10 @@ restore:
        {
                LOG_DEBUG("restoring register %s with value 0x%8.8x",
                         arm11->reg_list[i].name, context[i]);
-               arm11_set_reg(&arm11->reg_list[i], (u8*)&context[i]);
+               arm11_set_reg(&arm11->reg_list[i], (uint8_t*)&context[i]);
        }
        LOG_DEBUG("restoring CPSR with value 0x%8.8x", cpsr);
-       arm11_set_reg(&arm11->reg_list[ARM11_RC_CPSR], (u8*)&cpsr);
+       arm11_set_reg(&arm11->reg_list[ARM11_RC_CPSR], (uint8_t*)&cpsr);
 
 //     arm11->core_state = core_state;
 //     arm11->core_mode = core_mode;
@@ -1539,12 +1540,6 @@ int arm11_target_create(struct target_s *target, Jim_Interp *interp)
 
        arm11->target = target;
 
-       /* prepare JTAG information for the new target */
-       arm11->jtag_info.tap    = target->tap;
-       arm11->jtag_info.scann_size     = 5;
-
-       CHECK_RETVAL(arm_jtag_setup_connection(&arm11->jtag_info));
-
        if (target->tap==NULL)
                return ERROR_FAIL;
 
@@ -1637,7 +1632,7 @@ int arm11_examine(struct target_s *target)
 
        arm11_check_init(arm11, NULL);
 
-       target->type->examined = 1;
+       target_set_examined(target);
 
        return ERROR_OK;
 }
@@ -1673,7 +1668,7 @@ int arm11_get_reg(reg_t *reg)
 }
 
 /** Change a value in the register cache */
-int arm11_set_reg(reg_t *reg, u8 *buf)
+int arm11_set_reg(reg_t *reg, uint8_t *buf)
 {
        FNC_INFO;
 
@@ -1735,7 +1730,7 @@ int arm11_build_reg_cache(target_t *target)
 
                r->name                         = rd->name;
                r->size                         = 32;
-               r->value                        = (u8 *)(arm11->reg_values + i);
+               r->value                        = (uint8_t *)(arm11->reg_values + i);
                r->dirty                        = 0;
                r->valid                        = 0;
                r->bitfield_desc        = NULL;
@@ -1842,7 +1837,7 @@ arm11_common_t * arm11_find_target(const char * arg)
        jtag_tap_t *    tap;
        target_t *              t;
 
-       tap = jtag_TapByString(arg);
+       tap = jtag_tap_by_string(arg);
 
        if (!tap)
                return 0;
@@ -1853,7 +1848,7 @@ arm11_common_t * arm11_find_target(const char * arg)
                        continue;
 
                /* if (t->type == arm11_target) */
-               if (0 == strcmp(t->type->name, "arm11"))
+               if (0 == strcmp(target_get_name(t), "arm11"))
                        return t->arch_info;
        }
 
@@ -1960,7 +1955,7 @@ int arm11_register_commands(struct command_context_s *cmd_ctx)
 
                RC_FINAL_BOOL(  "error_fatal",                  "Terminate program if transfer error was found (default: enabled)",
                                                memwrite_error_fatal)
-       )
+       ) /* memwrite */
 
        RC_FINAL_BOOL(          "no_increment",                 "Don't increment address on multi-read/-write (default: disabled)",
                                                memrw_no_increment)
@@ -1976,7 +1971,7 @@ int arm11_register_commands(struct command_context_s *cmd_ctx)
 
        RC_FINAL(                       "mcr",                                  "Write Coprocessor register",
                                                arm11_handle_mcr)
-       )
+       ) /* arm11 */
 
        return ERROR_OK;
 }

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