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ARM11: register (most) standard ARM commands
[openocd.git] / src / target / arm11.c
diff --git a/src/target/arm11.c b/src/target/arm11.c
index 7a30bc7fab44e69c8c533e49e554b76704997340..4d9016fdc28bed8b8e17933d9c36523c103a0403 100644 (file)
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -26,12 +26,15 @@
 #include "config.h"
 #endif
 
+#include "etm.h"
 #include "arm11.h"
+#include "breakpoints.h"
 #include "arm11_dbgtap.h"
-#include "armv4_5.h"
 #include "arm_simulator.h"
 #include "time_support.h"
 #include "target_type.h"
+#include "algorithm.h"
+#include "register.h"
 
 
 #if 0
@@ -360,7 +363,7 @@ static int arm11_on_enter_debug_state(struct arm11_common *arm11)
        int retval;
        FNC_INFO;
 
-       for (size_t i = 0; i < asizeof(arm11->reg_values); i++)
+       for (size_t i = 0; i < ARRAY_SIZE(arm11->reg_values); i++)
        {
                arm11->reg_list[i].valid        = 1;
                arm11->reg_list[i].dirty        = 0;
@@ -383,7 +386,7 @@ static int arm11_on_enter_debug_state(struct arm11_common *arm11)
                arm11_setup_field(arm11,  1, NULL, NULL,                chain5_fields + 1);
                arm11_setup_field(arm11,  1, NULL, NULL,                chain5_fields + 2);
 
-               arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE);
+               arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
        }
        else
        {
@@ -663,7 +666,7 @@ static int arm11_leave_debug_state(struct arm11_common *arm11)
                arm11_setup_field(arm11,  1, &Ready,    NULL, chain5_fields + 1);
                arm11_setup_field(arm11,  1, &Valid,    NULL, chain5_fields + 2);
 
-               arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE);
+               arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
        }
 
        arm11_record_register_history(arm11);
@@ -874,7 +877,7 @@ static int arm11_resume(struct target *target, int current,
                        brp[1].address  = ARM11_SC7_BCR0 + brp_num;
                        brp[1].value    = 0x1 | (3 << 1) | (0x0F << 5) | (0 << 14) | (0 << 16) | (0 << 20) | (0 << 21);
 
-                       arm11_sc7_run(arm11, brp, asizeof(brp));
+                       arm11_sc7_run(arm11, brp, ARRAY_SIZE(brp));
 
                        LOG_DEBUG("Add BP " ZU " at %08" PRIx32 "", brp_num, bp->address);
 
@@ -1117,7 +1120,7 @@ static int arm11_step(struct target *target, int current,
                        brp[1].value    = 0x1 | (3 << 1) | (0x0F << 5) | (0 << 14) | (0 << 16) | (0 << 20) | (0 << 21);
                }
 
-               CHECK_RETVAL(arm11_sc7_run(arm11, brp, asizeof(brp)));
+               CHECK_RETVAL(arm11_sc7_run(arm11, brp, ARRAY_SIZE(brp)));
 
                /* resume */
 
@@ -1551,16 +1554,6 @@ static int arm11_bulk_write_memory(struct target *target,
        return arm11_write_memory(target, address, 4, count, buffer);
 }
 
-/* here we have nothing target specific to contribute, so we fail and then the
- * fallback code will read data from the target and calculate the CRC on the
- * host.
- */
-static int arm11_checksum_memory(struct target *target,
-               uint32_t address, uint32_t count, uint32_t* checksum)
-{
-       return ERROR_FAIL;
-}
-
 /* target break-/watchpoint control
 * rw: 0 = write, 1 = read, 2 = access
 */
@@ -1854,7 +1847,7 @@ static int arm11_examine(struct target *target)
        arm11_setup_field(arm11, 32, NULL,      &arm11->didr,           chain0_fields + 0);
        arm11_setup_field(arm11,  8, NULL,      &arm11->implementor,    chain0_fields + 1);
 
-       arm11_add_dr_scan_vc(asizeof(chain0_fields), chain0_fields, TAP_IDLE);
+       arm11_add_dr_scan_vc(ARRAY_SIZE(chain0_fields), chain0_fields, TAP_IDLE);
 
        CHECK_RETVAL(jtag_execute_queue());
 
@@ -1906,12 +1899,6 @@ static int arm11_examine(struct target *target)
                retval = etm_setup(target);
        }
 
-       /* FIXME this sets a flag in the (shared) arm11_target structure,
-        * not in the (per-cpu) "target" structure ... so it's clearly
-        * wrong in the case of e.g. two different ARM11 chips on the
-        * same board.  (Maybe ARM11 MPCore works though.)  Whoever calls
-        * the examine() method should set a target-specific flag...
-        */
        target_set_examined(target);
 
        return ERROR_OK;
@@ -1988,11 +1975,11 @@ static int arm11_build_reg_cache(struct target *target)
        size_t i;
 
        /* Not very elegant assertion */
-       if (ARM11_REGCACHE_COUNT != asizeof(arm11->reg_values) ||
-               ARM11_REGCACHE_COUNT != asizeof(arm11_reg_defs) ||
+       if (ARM11_REGCACHE_COUNT != ARRAY_SIZE(arm11->reg_values) ||
+               ARM11_REGCACHE_COUNT != ARRAY_SIZE(arm11_reg_defs) ||
                ARM11_REGCACHE_COUNT != ARM11_RC_MAX)
        {
-               LOG_ERROR("BUG: arm11->reg_values inconsistent (%d " ZU " " ZU " %d)", ARM11_REGCACHE_COUNT, asizeof(arm11->reg_values), asizeof(arm11_reg_defs), ARM11_RC_MAX);
+               LOG_ERROR("BUG: arm11->reg_values inconsistent (%d " ZU " " ZU " %d)", ARM11_REGCACHE_COUNT, ARRAY_SIZE(arm11->reg_values), ARRAY_SIZE(arm11_reg_defs), ARM11_RC_MAX);
                exit(-1);
        }
 
@@ -2145,56 +2132,14 @@ static int arm11_mcr(struct target *target, int cpnum,
        return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, &value, false);
 }
 
-#define ARM11_HANDLER(x)       .x = arm11_##x
-
-struct target_type arm11_target = {
-               .name = "arm11",
-
-               ARM11_HANDLER(poll),
-               ARM11_HANDLER(arch_state),
-
-               ARM11_HANDLER(target_request_data),
-
-               ARM11_HANDLER(halt),
-               ARM11_HANDLER(resume),
-               ARM11_HANDLER(step),
-
-               ARM11_HANDLER(assert_reset),
-               ARM11_HANDLER(deassert_reset),
-               ARM11_HANDLER(soft_reset_halt),
-
-               ARM11_HANDLER(get_gdb_reg_list),
-
-               ARM11_HANDLER(read_memory),
-               ARM11_HANDLER(write_memory),
-
-               ARM11_HANDLER(bulk_write_memory),
-
-               ARM11_HANDLER(checksum_memory),
-
-               ARM11_HANDLER(add_breakpoint),
-               ARM11_HANDLER(remove_breakpoint),
-               ARM11_HANDLER(add_watchpoint),
-               ARM11_HANDLER(remove_watchpoint),
-
-               ARM11_HANDLER(run_algorithm),
-
-               ARM11_HANDLER(register_commands),
-               ARM11_HANDLER(target_create),
-               ARM11_HANDLER(init_target),
-               ARM11_HANDLER(examine),
-
-               ARM11_HANDLER(mrc),
-               ARM11_HANDLER(mcr),
-       };
-
-
-int arm11_register_commands(struct command_context *cmd_ctx)
+static int arm11_register_commands(struct command_context *cmd_ctx)
 {
        FNC_INFO;
 
        struct command *top_cmd, *mw_cmd;
 
+       armv4_5_register_commands(cmd_ctx);
+
        top_cmd = register_command(cmd_ctx, NULL, "arm11",
                        NULL, COMMAND_ANY, NULL);
 
@@ -2228,3 +2173,46 @@ int arm11_register_commands(struct command_context *cmd_ctx)
 
        return etm_register_commands(cmd_ctx);
 }
+
+/** Holds methods for ARM11xx targets. */
+struct target_type arm11_target = {
+       .name =                 "arm11",
+
+       .poll =                 arm11_poll,
+       .arch_state =           arm11_arch_state,
+
+       .target_request_data =  arm11_target_request_data,
+
+       .halt =                 arm11_halt,
+       .resume =               arm11_resume,
+       .step =                 arm11_step,
+
+       .assert_reset =         arm11_assert_reset,
+       .deassert_reset =       arm11_deassert_reset,
+       .soft_reset_halt =      arm11_soft_reset_halt,
+
+       .get_gdb_reg_list =     arm11_get_gdb_reg_list,
+
+       .read_memory =          arm11_read_memory,
+       .write_memory =         arm11_write_memory,
+
+       .bulk_write_memory =    arm11_bulk_write_memory,
+
+       .checksum_memory =      arm_checksum_memory,
+       .blank_check_memory =   arm_blank_check_memory,
+
+       .add_breakpoint =       arm11_add_breakpoint,
+       .remove_breakpoint =    arm11_remove_breakpoint,
+       .add_watchpoint =       arm11_add_watchpoint,
+       .remove_watchpoint =    arm11_remove_watchpoint,
+
+       .run_algorithm =        arm11_run_algorithm,
+
+       .register_commands =    arm11_register_commands,
+       .target_create =        arm11_target_create,
+       .init_target =          arm11_init_target,
+       .examine =              arm11_examine,
+
+       .mrc =                  arm11_mrc,
+       .mcr =                  arm11_mcr,
+};
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