ARM: only use one set of dummy FPA registers

[openocd.git] / src / target / arm11.c

diff --git a/src/target/arm11.c b/src/target/arm11.c
index 750c1f5902dce37873815e5ee6b8a12f98a7cf43..5e7327583e8167276b632828222af0a5d5fe43b1 100644 (file)
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -27,7 +27,6 @@
 #endif
 
 #include "etm.h"
-#include "arm11.h"
 #include "breakpoints.h"
 #include "arm11_dbgtap.h"
 #include "arm_simulator.h"
@@ -59,8 +58,6 @@ static uint32_t arm11_vcr = 0;
 static bool arm11_config_step_irq_enable = false;
 static bool arm11_config_hardware_step = false;
 
-static int arm11_regs_arch_type = -1;
-
 enum arm11_regtype
 {
        ARM11_REGISTER_CORE,
@@ -249,38 +246,6 @@ enum arm11_regcache_ids
 
 #define ARM11_GDB_REGISTER_COUNT       26
 
-/* FIXME these are *identical* to the ARMv4_5 dummies ...  except
- * for their names, and being static vs global, and having different
- * addresses.  Ditto ARMv7a and ARMv7m dummies.
- */
-
-static uint8_t arm11_gdb_dummy_fp_value[12];
-
-static struct reg arm11_gdb_dummy_fp_reg =
-{
-       .name = "GDB dummy floating-point register",
-       .value = arm11_gdb_dummy_fp_value,
-       .dirty = 0,
-       .valid = 1,
-       .size = 96,
-       .arch_info = NULL,
-       .arch_type = 0,
-};
-
-static uint8_t arm11_gdb_dummy_fps_value[4];
-
-static struct reg arm11_gdb_dummy_fps_reg =
-{
-       .name = "GDB dummy floating-point status register",
-       .value = arm11_gdb_dummy_fps_value,
-       .dirty = 0,
-       .valid = 1,
-       .size = 32,
-       .arch_info = NULL,
-       .arch_type = 0,
-};
-
-
 static int arm11_on_enter_debug_state(struct arm11_common *arm11);
 static int arm11_step(struct target *target, int current,
                uint32_t address, int handle_breakpoints);
@@ -1270,12 +1235,10 @@ static int arm11_get_gdb_reg_list(struct target *target,
        *reg_list_size  = ARM11_GDB_REGISTER_COUNT;
        *reg_list               = malloc(sizeof(struct reg*) * ARM11_GDB_REGISTER_COUNT);
 
+       /* nine unused legacy FPA registers are expected by GDB */
        for (size_t i = 16; i < 24; i++)
-       {
-               (*reg_list)[i] = &arm11_gdb_dummy_fp_reg;
-       }
-
-       (*reg_list)[24] = &arm11_gdb_dummy_fps_reg;
+               (*reg_list)[i] = &arm_gdb_dummy_fp_reg;
+       (*reg_list)[24] = &arm_gdb_dummy_fps_reg;
 
        for (size_t i = 0; i < ARM11_REGCACHE_COUNT; i++)
        {
@@ -1665,13 +1628,13 @@ static int arm11_run_algorithm(struct target *target,
                if (!reg)
                {
                        LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
-                       exit(-1);
+                       return ERROR_INVALID_ARGUMENTS;
                }
 
                if (reg->size != reg_params[i].size)
                {
                        LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
-                       exit(-1);
+                       return ERROR_INVALID_ARGUMENTS;
                }
                arm11_set_reg(reg,reg_params[i].value);
 //             printf("%i: Set %s =%08x\n", i, reg_params[i].reg_name,val);
@@ -1750,13 +1713,15 @@ static int arm11_run_algorithm(struct target *target,
                        if (!reg)
                        {
                                LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
-                               exit(-1);
+                               retval = ERROR_INVALID_ARGUMENTS;
+                               goto del_breakpoint;
                        }
 
                        if (reg->size != reg_params[i].size)
                        {
                                LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
-                               exit(-1);
+                               retval = ERROR_INVALID_ARGUMENTS;
+                               goto del_breakpoint;
                        }
 
                        buf_set_u32(reg_params[i].value, 0, 32, buf_get_u32(reg->value, 0, 32));
@@ -1944,6 +1909,11 @@ static int arm11_set_reg(struct reg *reg, uint8_t *buf)
        return ERROR_OK;
 }
 
+static const struct reg_arch_type arm11_reg_type = {
+       .get = arm11_get_reg,
+       .set = arm11_set_reg,
+};
+
 static int arm11_build_reg_cache(struct target *target)
 {
        struct arm11_common *arm11 = target_to_arm11(target);
@@ -1952,12 +1922,6 @@ static int arm11_build_reg_cache(struct target *target)
        NEW(struct reg,                         reg_list,                       ARM11_REGCACHE_COUNT);
        NEW(struct arm11_reg_state,     arm11_reg_states,       ARM11_REGCACHE_COUNT);
 
-       if (arm11_regs_arch_type == -1)
-               arm11_regs_arch_type = register_reg_arch_type(arm11_get_reg, arm11_set_reg);
-
-       register_init_dummy(&arm11_gdb_dummy_fp_reg);
-       register_init_dummy(&arm11_gdb_dummy_fps_reg);
-
        arm11->reg_list = reg_list;
 
        /* Build the process context cache */
@@ -1994,7 +1958,7 @@ static int arm11_build_reg_cache(struct target *target)
                r->value                        = (uint8_t *)(arm11->reg_values + i);
                r->dirty                        = 0;
                r->valid                        = 0;
-               r->arch_type            = arm11_regs_arch_type;
+               r->type = &arm11_reg_type;
                r->arch_info            = rs;
 
                rs->def_index           = i;
@@ -2006,16 +1970,16 @@ static int arm11_build_reg_cache(struct target *target)
 
 static COMMAND_HELPER(arm11_handle_bool, bool *var, char *name)
 {
-       if (argc == 0)
+       if (CMD_ARGC == 0)
        {
                LOG_INFO("%s is %s.", name, *var ? "enabled" : "disabled");
                return ERROR_OK;
        }
 
-       if (argc != 1)
+       if (CMD_ARGC != 1)
                return ERROR_COMMAND_SYNTAX_ERROR;
 
-       switch (args[0][0])
+       switch (CMD_ARGV[0][0])
        {
        case '0':       /* 0 */
        case 'f':       /* false */
@@ -2053,11 +2017,11 @@ BOOL_WRAPPER(hardware_step,                     "hardware single step")
 
 COMMAND_HANDLER(arm11_handle_vcr)
 {
-       switch (argc) {
+       switch (CMD_ARGC) {
        case 0:
                break;
        case 1:
-               COMMAND_PARSE_NUMBER(u32, args[0], arm11_vcr);
+               COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], arm11_vcr);
                break;
        default:
                return ERROR_COMMAND_SYNTAX_ERROR;
@@ -2138,6 +2102,8 @@ static int arm11_register_commands(struct command_context *cmd_ctx)
 
        struct command *top_cmd, *mw_cmd;
 
+       armv4_5_register_commands(cmd_ctx);
+
        top_cmd = register_command(cmd_ctx, NULL, "arm11",
                        NULL, COMMAND_ANY, NULL);