#ifndef ARM11_H
#define ARM11_H
-#include "target.h"
-#include "register.h"
-#include "jtag.h"
-
-#define asizeof(x) (sizeof(x) / sizeof((x)[0]))
+#include "armv4_5.h"
#define NEW(type, variable, items) \
type * variable = calloc(1, sizeof(type) * items)
struct arm11_common
{
- target_t * target; /**< Reference back to the owner */
+ struct arm arm;
+ struct target * target; /**< Reference back to the owner */
/** \name Processor type detection */
/*@{*/
/** \name Shadow registers to save processor state */
/*@{*/
- reg_t * reg_list; /**< target register list */
+ struct reg * reg_list; /**< target register list */
uint32_t reg_values[ARM11_REGCACHE_COUNT]; /**< data for registers */
/*@}*/
size_t free_wrps; /**< keep track of breakpoints allocated by arm11_add_watchpoint() */
// GA
- reg_cache_t *core_cache;
+ struct reg_cache *core_cache;
+
+ struct arm_jtag jtag_info;
};
+static inline struct arm11_common *target_to_arm11(struct target *target)
+{
+ return container_of(target->arch_info, struct arm11_common,
+ arm);
+}
/**
* ARM11 DBGTAP instructions
ARM11_SC7_WCR0 = 112,
};
-typedef struct arm11_reg_state_s
+struct arm11_reg_state
{
uint32_t def_index;
- target_t * target;
-} arm11_reg_state_t;
-
-int arm11_register_commands(struct command_context_s *cmd_ctx);
-
-int arm11_read_etm(struct arm11_common * arm11, uint8_t address, uint32_t *value);
-int arm11_write_etm(struct arm11_common * arm11, uint8_t address, uint32_t value);
-
-
+ struct target * target;
+};
#endif /* ARM11_H */