target: don't implicitly include "breakpoint.h"

[openocd.git] / src / target / arm11.h

diff --git a/src/target/arm11.h b/src/target/arm11.h
index be5e77bd1a7f554e515a567b9a19c4d50eeb1cac..9bc6eb44e4fed57624654cbb73a7d90bbaceeec7 100644 (file)
--- a/src/target/arm11.h
+++ b/src/target/arm11.h
@@ -23,9 +23,7 @@
 #ifndef ARM11_H
 #define ARM11_H
 
-#include "target.h"
-#include "register.h"
-#include "jtag.h"
+#include "armv4_5.h"
 
 #define asizeof(x)     (sizeof(x) / sizeof((x)[0]))
 
@@ -64,11 +62,11 @@ do {                                                                                                                \
 } while (0)
 
 
-typedef struct arm11_register_history_s
+struct arm11_register_history
 {
        uint32_t                value;
        uint8_t         valid;
-}arm11_register_history_t;
+};
 
 enum arm11_debug_version
 {
@@ -78,9 +76,10 @@ enum arm11_debug_version
        ARM11_DEBUG_V7_CP14             = 0x04,
 };
 
-typedef struct arm11_common_s
+struct arm11_common
 {
-       target_t *      target;         /**< Reference back to the owner */
+       struct arm      arm;
+       struct target * target;         /**< Reference back to the owner */
 
        /** \name Processor type detection */
        /*@{*/
@@ -104,21 +103,28 @@ typedef struct arm11_common_s
        /** \name Shadow registers to save processor state */
        /*@{*/
 
-       reg_t * reg_list;                                                       /**< target register list */
+       struct reg *    reg_list;                                                       /**< target register list */
        uint32_t                reg_values[ARM11_REGCACHE_COUNT];       /**< data for registers */
 
        /*@}*/
 
-       arm11_register_history_t
+       struct arm11_register_history
                reg_history[ARM11_REGCACHE_COUNT];      /**< register state before last resume */
 
        size_t  free_brps;                              /**< keep track of breakpoints allocated by arm11_add_breakpoint() */
        size_t  free_wrps;                              /**< keep track of breakpoints allocated by arm11_add_watchpoint() */
 
        // GA
-       reg_cache_t *core_cache;
-} arm11_common_t;
+       struct reg_cache *core_cache;
+
+       struct arm_jtag jtag_info;
+};
 
+static inline struct arm11_common *target_to_arm11(struct target *target)
+{
+       return container_of(target->arch_info, struct arm11_common,
+                       arm);
+}
 
 /**
  * ARM11 DBGTAP instructions
@@ -176,12 +182,10 @@ enum arm11_sc7
        ARM11_SC7_WCR0                          = 112,
 };
 
-typedef struct arm11_reg_state_s
+struct arm11_reg_state
 {
        uint32_t                                def_index;
-       target_t *                      target;
-} arm11_reg_state_t;
-
-int arm11_register_commands(struct command_context_s *cmd_ctx);
+       struct target *                 target;
+};
 
 #endif /* ARM11_H */