#include "time_support.h"
#if 0
-#define JTAG_DEBUG(expr ...) DEBUG(expr)
+#define JTAG_DEBUG(expr ...) do { if (1) LOG_DEBUG(expr); } while (0)
#else
-#define JTAG_DEBUG(expr ...) do {} while (0)
+#define JTAG_DEBUG(expr ...) do { if (0) LOG_DEBUG(expr); } while (0)
#endif
/*
};
-int arm11_add_ir_scan_vc(int num_fields, struct scan_field *fields, tap_state_t state)
+static int arm11_add_ir_scan_vc(int num_fields, struct scan_field *fields,
+ tap_state_t state)
{
if (cmd_queue_cur_state == TAP_IRPAUSE)
jtag_add_pathmove(ARRAY_SIZE(arm11_move_pi_to_si_via_ci), arm11_move_pi_to_si_via_ci);
*/
void arm11_setup_field(struct arm11_common * arm11, int num_bits, void * out_data, void * in_data, struct scan_field * field)
{
- field->tap = arm11->target->tap;
+ field->tap = arm11->arm.target->tap;
field->num_bits = num_bits;
field->out_value = out_data;
field->in_value = in_data;
*/
void arm11_add_IR(struct arm11_common * arm11, uint8_t instr, tap_state_t state)
{
- struct jtag_tap *tap;
- tap = arm11->target->tap;
+ struct jtag_tap *tap = arm11->arm.target->tap;
if (buf_get_u32(tap->cur_instr, 0, 5) == instr)
{
*
* \remarks This adds to the JTAG command queue but does \em not execute it.
*/
-void arm11_add_debug_INST(struct arm11_common * arm11, uint32_t inst, uint8_t * flag, tap_state_t state)
+static void arm11_add_debug_INST(struct arm11_common * arm11,
+ uint32_t inst, uint8_t * flag, tap_state_t state)
{
- JTAG_DEBUG("INST <= 0x%08x", inst);
+ JTAG_DEBUG("INST <= 0x%08x", (unsigned) inst);
struct scan_field itr[2];
CHECK_RETVAL(jtag_execute_queue());
if (arm11->last_dscr != dscr)
- JTAG_DEBUG("DSCR = %08x (OLD %08x)", dscr, arm11->last_dscr);
+ JTAG_DEBUG("DSCR = %08x (OLD %08x)",
+ (unsigned) dscr,
+ (unsigned) arm11->last_dscr);
arm11->last_dscr = dscr;
CHECK_RETVAL(jtag_execute_queue());
- JTAG_DEBUG("DSCR <= %08x (OLD %08x)", dscr, arm11->last_dscr);
+ JTAG_DEBUG("DSCR <= %08x (OLD %08x)",
+ (unsigned) dscr,
+ (unsigned) arm11->last_dscr);
arm11->last_dscr = dscr;
* \param count Number of opcodes to execute
*
*/
-int arm11_run_instr_no_data(struct arm11_common * arm11, uint32_t * opcode, size_t count)
+static
+int arm11_run_instr_no_data(struct arm11_common * arm11,
+ uint32_t * opcode, size_t count)
{
arm11_add_IR(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT);
CHECK_RETVAL(jtag_execute_queue());
- JTAG_DEBUG("DTR Data %08x Ready %d nRetry %d", Data, Ready, nRetry);
+ JTAG_DEBUG("DTR Data %08x Ready %d nRetry %d",
+ (unsigned) Data, Ready, nRetry);
long long then = 0;
arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2);
uint8_t *Readies;
- size_t readiesNum = (count + 1);
- size_t bytes = sizeof(*Readies)*readiesNum;
+ unsigned readiesNum = count + 1;
+ unsigned bytes = sizeof(*Readies)*readiesNum;
+
Readies = (uint8_t *) malloc(bytes);
if (Readies == NULL)
{
- LOG_ERROR("Out of memory allocating " ZU " bytes", bytes);
+ LOG_ERROR("Out of memory allocating %u bytes", bytes);
return ERROR_FAIL;
}
int retval = jtag_execute_queue();
if (retval == ERROR_OK)
{
- size_t error_count = 0;
+ unsigned error_count = 0;
for (size_t i = 0; i < readiesNum; i++)
{
}
if (error_count > 0 )
- LOG_ERROR(ZU " words out of " ZU " not transferred", error_count, readiesNum);
+ LOG_ERROR("%u words out of %u not transferred",
+ error_count, readiesNum);
}
CHECK_RETVAL(jtag_execute_queue());
- JTAG_DEBUG("DTR Data %08x Ready %d nRetry %d", Data, Ready, nRetry);
+ JTAG_DEBUG("DTR Data %08x Ready %d nRetry %d",
+ (unsigned) Data, Ready, nRetry);
long long then = 0;
do
{
- JTAG_DEBUG("SC7 <= Address %02x Data %08x nRW %d", AddressOut, DataOut, nRW);
+ JTAG_DEBUG("SC7 <= Address %02x Data %08x nRW %d",
+ (unsigned) AddressOut,
+ (unsigned) DataOut,
+ nRW);
- arm11_add_dr_scan_vc(ARRAY_SIZE(chain7_fields), chain7_fields, TAP_DRPAUSE);
+ arm11_add_dr_scan_vc(ARRAY_SIZE(chain7_fields),
+ chain7_fields, TAP_DRPAUSE);
CHECK_RETVAL(jtag_execute_queue());
- JTAG_DEBUG("SC7 => Address %02x Data %08x Ready %d", AddressIn, DataIn, Ready);
+ JTAG_DEBUG("SC7 => Address %02x Data %08x Ready %d",
+ (unsigned) AddressIn,
+ (unsigned) DataIn,
+ Ready);
}
while (!Ready); /* 'nRW' is 'Ready' on read out */
for (size_t i = 0; i < count; i++)
{
- JTAG_DEBUG("SC7 %02d: %02x %s %08x", i, actions[i].address, actions[i].write ? "<=" : "=>", actions[i].value);
+ JTAG_DEBUG("SC7 %02d: %02x %s %08x",
+ (unsigned) i, actions[i].address,
+ actions[i].write ? "<=" : "=>",
+ (unsigned) actions[i].value);
}
return ERROR_OK;
*/
void arm11_sc7_clear_vbw(struct arm11_common * arm11)
{
- struct arm11_sc7_action clear_bw[arm11->brp + arm11->wrp + 1];
+ size_t clear_bw_size = arm11->brp + arm11->wrp + 1;
+ struct arm11_sc7_action *clear_bw = malloc(sizeof(struct arm11_sc7_action) * clear_bw_size);
struct arm11_sc7_action * pos = clear_bw;
- for (size_t i = 0; i < ARRAY_SIZE(clear_bw); i++)
+ for (size_t i = 0; i < clear_bw_size; i++)
{
clear_bw[i].write = true;
clear_bw[i].value = 0;
(pos++)->address = ARM11_SC7_VCR;
- arm11_sc7_run(arm11, clear_bw, ARRAY_SIZE(clear_bw));
+ arm11_sc7_run(arm11, clear_bw, clear_bw_size);
+
+ free (clear_bw);
}
/** Write VCR register
return arm11_run_instr_data_finish(arm11);
}
+
+/************************************************************************/
+
+/*
+ * ARM11 provider for the OpenOCD implementation of the standard
+ * architectural ARM v6/v7 "Debug Programmer's Model" (DPM).
+ */
+
+static inline struct arm11_common *dpm_to_arm11(struct arm_dpm *dpm)
+{
+ return container_of(dpm, struct arm11_common, dpm);
+}
+
+static int arm11_dpm_prepare(struct arm_dpm *dpm)
+{
+ struct arm11_common *arm11 = dpm_to_arm11(dpm);
+
+ arm11 = container_of(dpm->arm, struct arm11_common, arm);
+
+ return arm11_run_instr_data_prepare(dpm_to_arm11(dpm));
+}
+
+static int arm11_dpm_finish(struct arm_dpm *dpm)
+{
+ return arm11_run_instr_data_finish(dpm_to_arm11(dpm));
+}
+
+static int arm11_dpm_instr_write_data_dcc(struct arm_dpm *dpm,
+ uint32_t opcode, uint32_t data)
+{
+ return arm11_run_instr_data_to_core(dpm_to_arm11(dpm),
+ opcode, &data, 1);
+}
+
+static int arm11_dpm_instr_write_data_r0(struct arm_dpm *dpm,
+ uint32_t opcode, uint32_t data)
+{
+ return arm11_run_instr_data_to_core_via_r0(dpm_to_arm11(dpm),
+ opcode, data);
+}
+
+static int arm11_dpm_instr_read_data_dcc(struct arm_dpm *dpm,
+ uint32_t opcode, uint32_t *data)
+{
+ return arm11_run_instr_data_from_core(dpm_to_arm11(dpm),
+ opcode, data, 1);
+}
+
+static int arm11_dpm_instr_read_data_r0(struct arm_dpm *dpm,
+ uint32_t opcode, uint32_t *data)
+{
+ return arm11_run_instr_data_from_core_via_r0(dpm_to_arm11(dpm),
+ opcode, data);
+}
+
+/** Set up high-level debug module utilities */
+int arm11_dpm_init(struct arm11_common *arm11, uint32_t didr)
+{
+ struct arm_dpm *dpm = &arm11->dpm;
+ int retval;
+
+ dpm->arm = &arm11->arm;
+
+ dpm->didr = didr;
+
+ dpm->prepare = arm11_dpm_prepare;
+ dpm->finish = arm11_dpm_finish;
+
+ dpm->instr_write_data_dcc = arm11_dpm_instr_write_data_dcc;
+ dpm->instr_write_data_r0 = arm11_dpm_instr_write_data_r0;
+
+ dpm->instr_read_data_dcc = arm11_dpm_instr_read_data_dcc;
+ dpm->instr_read_data_r0 = arm11_dpm_instr_read_data_r0;
+
+ retval = arm_dpm_setup(dpm);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = arm_dpm_initialize(dpm);
+
+ return retval;
+}