* NOTE: the ITRSEL instruction fakes SCREG changing;
* but leaves its actual value unchanged.
*/
+#if 0
+ // FIX!!! the optimization below is broken because we do not
+ // invalidate the cur_scan_chain upon a TRST/TMS. See arm_jtag.c
+ // for example on how to invalidate cur_scan_chain. Tested patches gladly
+ // accepted!
if (arm11->jtag_info.cur_scan_chain == chain) {
JTAG_DEBUG("SCREG <= %d SKIPPED", chain);
return jtag_add_statemove((state == ARM11_TAP_DEFAULT)
? TAP_DRPAUSE : state);
}
+#endif
JTAG_DEBUG("SCREG <= %d", chain);
arm11_add_IR(arm11, ARM11_SCAN_N, ARM11_TAP_DEFAULT);
int retval = arm11_run_instr_data_to_core_noack_inner(arm11->arm.target->tap, opcode, data, count);
- if (retval != ERROR_FAIL)
+ if (retval != ERROR_OK)
return retval;
arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT);
* \param arm11 Target state variable.
*
*/
-void arm11_sc7_clear_vbw(struct arm11_common * arm11)
+int arm11_sc7_clear_vbw(struct arm11_common * arm11)
{
size_t clear_bw_size = arm11->brp + 1;
struct arm11_sc7_action *clear_bw = malloc(sizeof(struct arm11_sc7_action) * clear_bw_size);
(pos++)->address = ARM11_SC7_VCR;
- arm11_sc7_run(arm11, clear_bw, clear_bw_size);
+ int retval;
+ retval = arm11_sc7_run(arm11, clear_bw, clear_bw_size);
free (clear_bw);
+
+ return retval;
}
/** Write VCR register
* \param arm11 Target state variable.
* \param value Value to be written
*/
-void arm11_sc7_set_vcr(struct arm11_common * arm11, uint32_t value)
+int arm11_sc7_set_vcr(struct arm11_common * arm11, uint32_t value)
{
struct arm11_sc7_action set_vcr;
set_vcr.address = ARM11_SC7_VCR;
set_vcr.value = value;
- arm11_sc7_run(arm11, &set_vcr, 1);
+ return arm11_sc7_run(arm11, &set_vcr, 1);
}
static int arm11_dpm_prepare(struct arm_dpm *dpm)
{
- struct arm11_common *arm11 = dpm_to_arm11(dpm);
-
- arm11 = container_of(dpm->arm, struct arm11_common, arm);
-
return arm11_run_instr_data_prepare(dpm_to_arm11(dpm));
}