-enum tap_state arm11_move_pi_to_si_via_ci[] =
+/*
+This pathmove goes from Pause-IR to Shift-IR while avoiding RTI. The
+behavior of the FTDI driver IIRC was to go via RTI.
+
+Conversely there may be other places in this code where the ARM11 code relies
+on the driver to hit through RTI when coming from Update-?R.
+*/
+static const tap_state_t arm11_move_pi_to_si_via_ci[] =
{
TAP_IREXIT2, TAP_IRUPDATE, TAP_DRSELECT, TAP_IRSELECT, TAP_IRCAPTURE, TAP_IRSHIFT
};
{
TAP_IREXIT2, TAP_IRUPDATE, TAP_DRSELECT, TAP_IRSELECT, TAP_IRCAPTURE, TAP_IRSHIFT
};
- if (cmd_queue_cur_state == TAP_IRPAUSE)
- jtag_add_pathmove(asizeof(arm11_move_pi_to_si_via_ci), arm11_move_pi_to_si_via_ci);
+ if (cmd_queue_cur_state == TAP_IRPAUSE)
+ jtag_add_pathmove(ARRAY_SIZE(arm11_move_pi_to_si_via_ci), arm11_move_pi_to_si_via_ci);
- TAP_DREXIT2, TAP_DRUPDATE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
+ TAP_DREXIT2, TAP_DRUPDATE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
- if (cmd_queue_cur_state == TAP_DRPAUSE)
- jtag_add_pathmove(asizeof(arm11_move_pd_to_sd_via_cd), arm11_move_pd_to_sd_via_cd);
+ if (cmd_queue_cur_state == TAP_DRPAUSE)
+ jtag_add_pathmove(ARRAY_SIZE(arm11_move_pd_to_sd_via_cd), arm11_move_pd_to_sd_via_cd);
- * \param arm11 Target state variable.
- * \param num_bits Length of the data field
- * \param out_data pointer to the data that will be sent out
- * <em>(data is read when it is added to the JTAG queue)</em>
- * \param in_data pointer to the memory that will receive data that was clocked in
- * <em>(data is written when the JTAG queue is executed)</em>
- * \param field target data structure that will be initialized
+ * \param arm11 Target state variable.
+ * \param num_bits Length of the data field
+ * \param out_data pointer to the data that will be sent out
+ * <em > (data is read when it is added to the JTAG queue)</em>
+ * \param in_data pointer to the memory that will receive data that was clocked in
+ * <em > (data is written when the JTAG queue is executed)</em>
+ * \param field target data structure that will be initialized
-void arm11_setup_field(arm11_common_t * arm11, int num_bits, void * out_data, void * in_data, scan_field_t * field)
+void arm11_setup_field(struct arm11_common * arm11, int num_bits, void * out_data, void * in_data, struct scan_field * field)
- field->tap = arm11->jtag_info.tap;
- field->num_bits = num_bits;
- field->out_mask = NULL;
- field->in_check_mask = NULL;
- field->in_check_value = NULL;
- field->in_handler = NULL;
- field->in_handler_priv = NULL;
-
- field->out_value = out_data;
- field->in_value = in_data;
+ field->tap = arm11->target->tap;
+ field->num_bits = num_bits;
+ field->out_value = out_data;
+ field->in_value = in_data;
- * \param arm11 Target state variable.
- * \param instr An ARM11 DBGTAP instruction. Use enum #arm11_instructions.
- * \param state Pass the final TAP state or -1 for the default value (Pause-IR).
+ * \param arm11 Target state variable.
+ * \param instr An ARM11 DBGTAP instruction. Use enum #arm11_instructions.
+ * \param state Pass the final TAP state or ARM11_TAP_DEFAULT for the default value (Pause-IR).
- arm11_setup_field(arm11, 5, &instr, NULL, &field);
+ arm11_setup_field(arm11, 5, &instr, NULL, &field);
- * \warning (Obsolete) Using this twice in a row will \em fail. The first call will end
- * in Pause-DR. The second call, due to the IR caching, will not
- * go through Capture-DR when shifting in the new scan chain number.
- * As a result the verification in arm11_in_handler_SCAN_N() must
- * fail.
+ * \warning (Obsolete) Using this twice in a row will \em fail. The first
+ * call will end in Pause-DR. The second call, due to the IR
+ * caching, will not go through Capture-DR when shifting in the
+ * new scan chain number. As a result the verification in
+ * arm11_in_handler_SCAN_N() must fail.
- JTAG_DEBUG("SCREG <= 0x%02x", chain);
+ JTAG_DEBUG("SCREG <= 0x%02x", chain);
+
+ arm11_add_IR(arm11, ARM11_SCAN_N, ARM11_TAP_DEFAULT);
+
+ struct scan_field field;
+
+ uint8_t tmp[1];
+ arm11_setup_field(arm11, 5, &chain, &tmp, &field);
- * \param arm11 Target state variable.
- * \param inst An ARM11 processor instruction/opcode.
- * \param flag Optional parameter to retrieve the InstCompl flag
- * (this will be written when the JTAG chain is executed).
- * \param state Pass the final TAP state or -1 for the default
- * value (Run-Test/Idle).
- *
- * \remarks By default this ends with Run-Test/Idle state
- * and causes the instruction to be executed. If
- * a subsequent write to DTR is needed before
- * executing the instruction then TAP_DRPAUSE should be
- * passed to \p state.
- *
- * \remarks This adds to the JTAG command queue but does \em not execute it.
+ * \param arm11 Target state variable.
+ * \param inst An ARM11 processor instruction/opcode.
+ * \param flag Optional parameter to retrieve the InstCompl flag
+ * (this will be written when the JTAG chain is executed).
+ * \param state Pass the final TAP state or ARM11_TAP_DEFAULT for the default
+ * value (Run-Test/Idle).
+ *
+ * \remarks By default this ends with Run-Test/Idle state
+ * and causes the instruction to be executed. If
+ * a subsequent write to DTR is needed before
+ * executing the instruction then TAP_DRPAUSE should be
+ * passed to \p state.
+ *
+ * \remarks This adds to the JTAG command queue but does \em not execute it.
- arm11_setup_field(arm11, 32, &inst, NULL, itr + 0);
- arm11_setup_field(arm11, 1, NULL, flag, itr + 1);
+ arm11_setup_field(arm11, 32, &inst, NULL, itr + 0);
+ arm11_setup_field(arm11, 1, NULL, flag, itr + 1);
- arm11_add_debug_SCAN_N(arm11, 0x01, -1);
+ int retval;
+ retval = arm11_add_debug_SCAN_N(arm11, 0x01, ARM11_TAP_DEFAULT);
+ if (retval != ERROR_OK)
+ return retval;
+
+ arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT);
- arm11_add_debug_SCAN_N(arm11, 0x01, -1);
+ int retval;
+ retval = arm11_add_debug_SCAN_N(arm11, 0x01, ARM11_TAP_DEFAULT);
+ if (retval != ERROR_OK)
+ return retval;
+
+ arm11_add_IR(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT);
- switch (dscr & ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_MASK)
- {
- case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_HALT:
- LOG_INFO("Debug entry: JTAG HALT");
- return DBG_REASON_DBGRQ;
-
- case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BREAKPOINT:
- LOG_INFO("Debug entry: breakpoint");
- return DBG_REASON_BREAKPOINT;
-
- case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_WATCHPOINT:
- LOG_INFO("Debug entry: watchpoint");
- return DBG_REASON_WATCHPOINT;
-
- case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BKPT_INSTRUCTION:
- LOG_INFO("Debug entry: BKPT instruction");
- return DBG_REASON_BREAKPOINT;
-
- case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_EDBGRQ:
- LOG_INFO("Debug entry: EDBGRQ signal");
- return DBG_REASON_DBGRQ;
-
- case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_VECTOR_CATCH:
- LOG_INFO("Debug entry: VCR vector catch");
- return DBG_REASON_BREAKPOINT;
-
- default:
- LOG_INFO("Debug entry: unknown");
- return DBG_REASON_DBGRQ;
- }
+ switch (dscr & ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_MASK)
+ {
+ case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_HALT:
+ LOG_INFO("Debug entry: JTAG HALT");
+ return DBG_REASON_DBGRQ;
+
+ case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BREAKPOINT:
+ LOG_INFO("Debug entry: breakpoint");
+ return DBG_REASON_BREAKPOINT;
+
+ case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_WATCHPOINT:
+ LOG_INFO("Debug entry: watchpoint");
+ return DBG_REASON_WATCHPOINT;
+
+ case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BKPT_INSTRUCTION:
+ LOG_INFO("Debug entry: BKPT instruction");
+ return DBG_REASON_BREAKPOINT;
+
+ case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_EDBGRQ:
+ LOG_INFO("Debug entry: EDBGRQ signal");
+ return DBG_REASON_DBGRQ;
+
+ case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_VECTOR_CATCH:
+ LOG_INFO("Debug entry: VCR vector catch");
+ return DBG_REASON_BREAKPOINT;
+
+ default:
+ LOG_INFO("Debug entry: unknown");
+ return DBG_REASON_DBGRQ;
+ }
- arm11_add_IR(arm11, ARM11_ITRSEL, -1);
-
- while (count--)
- {
- arm11_add_debug_INST(arm11, *opcode++, NULL, TAP_IDLE);
+ arm11_add_IR(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT);
+ arm11_add_debug_INST(arm11, *opcode++, NULL, TAP_IDLE);
+
+ int i = 0;
+ while (1)
+ {
+ uint8_t flag;
+
+ arm11_add_debug_INST(arm11, 0, &flag, count ? TAP_IDLE : TAP_DRPAUSE);
+
+ CHECK_RETVAL(jtag_execute_queue());
+
+ if (flag)
+ break;
- arm11_setup_field(arm11, 32, &Data, NULL, chain5_fields + 0);
- arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1);
- arm11_setup_field(arm11, 1, NULL, &nRetry, chain5_fields + 2);
+ arm11_setup_field(arm11, 32, &Data, NULL, chain5_fields + 0);
+ arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1);
+ arm11_setup_field(arm11, 1, NULL, &nRetry, chain5_fields + 2);
- arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE);
- jtag_execute_queue();
+ JTAG_DEBUG("DTR Data %08x Ready %d nRetry %d", Data, Ready, nRetry);
+
+ long long then = 0;
+
+ if (i == 1000)
+ {
+ then = timeval_ms();
+ }
+ if (i >= 1000)
+ {
+ if ((timeval_ms()-then) > 1000)
+ {
+ LOG_WARNING("Timeout (1000ms) waiting for instructions to complete");
+ return ERROR_FAIL;
+ }
+ }
- TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
+ TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
-void arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, u32 opcode, u32 * data, size_t count)
+int arm11_run_instr_data_to_core_noack(struct arm11_common * arm11, uint32_t opcode, uint32_t * data, size_t count)
- arm11_add_IR(arm11, ARM11_ITRSEL, -1);
-
- arm11_add_debug_INST(arm11, opcode, NULL, TAP_DRPAUSE);
-
- arm11_add_IR(arm11, ARM11_EXTEST, -1);
+ arm11_add_IR(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT);
- arm11_setup_field(arm11, 32, NULL/*&Data*/, NULL, chain5_fields + 0);
- arm11_setup_field(arm11, 1, NULL, NULL /*&Ready*/, chain5_fields + 1);
- arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2);
+ arm11_add_IR(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT);
- while (count--)
- {
- chain5_fields[0].out_value = (void *)(data++);
- chain5_fields[1].in_value = ReadyPos++;
+ arm11_setup_field(arm11, 32, NULL/*&Data*/, NULL, chain5_fields + 0);
+ arm11_setup_field(arm11, 1, NULL, NULL /*&Ready*/, chain5_fields + 1);
+ arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2);
- jtag_add_dr_scan(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE);
- jtag_add_pathmove(asizeof(arm11_MOVE_PD_RTI_PD_with_delay),
- arm11_MOVE_PD_RTI_PD_with_delay);
+ LOG_ERROR("Out of memory allocating " ZU " bytes", bytes);
+ return ERROR_FAIL;
- jtag_add_dr_scan(asizeof(chain5_fields), chain5_fields, TAP_IDLE);
+ chain5_fields[0].out_value = (void *)(data++);
+ chain5_fields[1].in_value = ReadyPos++;
+
+ if (count)
+ {
+ jtag_add_dr_scan(ARRAY_SIZE(chain5_fields), chain5_fields, jtag_set_end_state(TAP_DRPAUSE));
+ jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
+ arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
+ }
+ else
+ {
+ jtag_add_dr_scan(ARRAY_SIZE(chain5_fields), chain5_fields, jtag_set_end_state(TAP_IDLE));
+ }
- arm11_setup_field(arm11, 32, NULL, &Data, chain5_fields + 0);
- arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1);
- arm11_setup_field(arm11, 1, NULL, &nRetry, chain5_fields + 2);
+ arm11_setup_field(arm11, 32, NULL, &Data, chain5_fields + 0);
+ arm11_setup_field(arm11, 1, NULL, &Ready, chain5_fields + 1);
+ arm11_setup_field(arm11, 1, NULL, &nRetry, chain5_fields + 2);
- arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, count ? TAP_IDLE : TAP_DRPAUSE);
- jtag_execute_queue();
+ int i = 0;
+ do
+ {
+ arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, count ? TAP_IDLE : TAP_DRPAUSE);
+
+ CHECK_RETVAL(jtag_execute_queue());
+
+ JTAG_DEBUG("DTR Data %08x Ready %d nRetry %d", Data, Ready, nRetry);
+
+ long long then = 0;
+
+ if (i == 1000)
+ {
+ then = timeval_ms();
+ }
+ if (i >= 1000)
+ {
+ if ((timeval_ms()-then) > 1000)
+ {
+ LOG_WARNING("Timeout (1000ms) waiting for instructions to complete");
+ return ERROR_FAIL;
+ }
+ }
+
+ i++;
+ }
+ while (!Ready);
- /* MCR p14,0,R0,c0,c5,0 (move r0 -> wDTR -> local var) */
- arm11_run_instr_data_from_core(arm11, 0xEE000E15, data, 1);
+ /* MCR p14,0,R0,c0,c5,0 (move r0 -> wDTR -> local var) */
+ arm11_run_instr_data_from_core(arm11, 0xEE000E15, data, 1);
+
+ return ERROR_OK;
- /* MRC p14,0,r0,c0,c5,0 */
- arm11_run_instr_data_to_core1(arm11, 0xEE100E15, data);
+ int retval;
+ /* MRC p14,0,r0,c0,c5,0 */
+ retval = arm11_run_instr_data_to_core1(arm11, 0xEE100E15, data);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = arm11_run_instr_no_data1(arm11, opcode);
+ if (retval != ERROR_OK)
+ return retval;
*
* \param arm11 Target state variable.
* \param actions A list of read and/or write instructions
* \param count Number of instructions in the list.
*
*/
*
* \param arm11 Target state variable.
* \param actions A list of read and/or write instructions
* \param count Number of instructions in the list.
*
*/
- arm11_setup_field(arm11, 1, &nRW, &Ready, chain7_fields + 0);
- arm11_setup_field(arm11, 32, &DataOut, &DataIn, chain7_fields + 1);
- arm11_setup_field(arm11, 7, &AddressOut, &AddressIn, chain7_fields + 2);
+ uint8_t nRW;
+ uint32_t DataOut;
+ uint8_t AddressOut;
+ uint8_t Ready;
+ uint32_t DataIn;
+ uint8_t AddressIn;
- {size_t i;
- for (i = 0; i < count + 1; i++)
- {
- if (i < count)
- {
- nRW = actions[i].write ? 1 : 0;
- DataOut = actions[i].value;
- AddressOut = actions[i].address;
- }
- else
- {
- nRW = 0;
- DataOut = 0;
- AddressOut = 0;
- }
+ arm11_setup_field(arm11, 1, &nRW, &Ready, chain7_fields + 0);
+ arm11_setup_field(arm11, 32, &DataOut, &DataIn, chain7_fields + 1);
+ arm11_setup_field(arm11, 7, &AddressOut, &AddressIn, chain7_fields + 2);
- JTAG_DEBUG("SC7 <= Address %02x Data %08x nRW %d", AddressOut, DataOut, nRW);
+ if (i < count)
+ {
+ nRW = actions[i].write ? 1 : 0;
+ DataOut = actions[i].value;
+ AddressOut = actions[i].address;
+ }
+ else
+ {
+ nRW = 0;
+ DataOut = 0;
+ AddressOut = 0;
+ }
- JTAG_DEBUG("SC7 => Address %02x Data %08x Ready %d", AddressIn, DataIn, Ready);
- }
- while (!Ready); /* 'nRW' is 'Ready' on read out */
+ arm11_add_dr_scan_vc(ARRAY_SIZE(chain7_fields), chain7_fields, TAP_DRPAUSE);
- if (i > 0)
- {
- if (actions[i - 1].address != AddressIn)
- {
- LOG_WARNING("Scan chain 7 shifted out unexpected address");
- }
-
- if (!actions[i - 1].write)
- {
- actions[i - 1].value = DataIn;
- }
- else
- {
- if (actions[i - 1].value != DataIn)
+ CHECK_RETVAL(jtag_execute_queue());
+
+ JTAG_DEBUG("SC7 => Address %02x Data %08x Ready %d", AddressIn, DataIn, Ready);
+ }
+ while (!Ready); /* 'nRW' is 'Ready' on read out */
+
+ if (i > 0)
- LOG_WARNING("Scan chain 7 shifted out unexpected data");
+ if (actions[i - 1].address != AddressIn)
+ {
+ LOG_WARNING("Scan chain 7 shifted out unexpected address");
+ }
+
+ if (!actions[i - 1].write)
+ {
+ actions[i - 1].value = DataIn;
+ }
+ else
+ {
+ if (actions[i - 1].value != DataIn)
+ {
+ LOG_WARNING("Scan chain 7 shifted out unexpected data");
+ }
+ }
- {size_t i;
- for (i = 0; i < count; i++)
- {
- JTAG_DEBUG("SC7 %02d: %02x %s %08x", i, actions[i].address, actions[i].write ? "<=" : "=>", actions[i].value);
- }}
+ for (size_t i = 0; i < count; i++)
+ {
+ JTAG_DEBUG("SC7 %02d: %02x %s %08x", i, actions[i].address, actions[i].write ? "<=" : "=>", actions[i].value);
+ }
+
+ return ERROR_OK;
- arm11_sc7_action_t clear_bw[arm11->brp + arm11->wrp + 1];
- arm11_sc7_action_t * pos = clear_bw;
+ struct arm11_sc7_action clear_bw[arm11->brp + arm11->wrp + 1];
+ struct arm11_sc7_action * pos = clear_bw;
+
+ for (size_t i = 0; i < ARRAY_SIZE(clear_bw); i++)
+ {
+ clear_bw[i].write = true;
+ clear_bw[i].value = 0;
+ }
+
+ for (size_t i = 0; i < arm11->brp; i++)
+ (pos++)->address = ARM11_SC7_BCR0 + i;
- /* MRC p14,0,r0,c0,c5,0 (r0 = address) */
- arm11_run_instr_data_to_core1(arm11, 0xee100e15, address);
+ /* MRC p14,0,r0,c0,c5,0 (r0 = address) */
+ CHECK_RETVAL(arm11_run_instr_data_to_core1(arm11, 0xee100e15, address));
- /* LDC p14,c5,[R0],#4 (DTR = [r0]) */
- arm11_run_instr_data_from_core(arm11, 0xecb05e01, result, 1);
+ /* LDC p14,c5,[R0],#4 (DTR = [r0]) */
+ CHECK_RETVAL(arm11_run_instr_data_from_core(arm11, 0xecb05e01, result, 1));