return retval;
}
- struct arm_algorithm armv4_5_info;
+ struct arm_algorithm arm_algo;
struct reg_param reg_params[1];
- armv4_5_info.common_magic = ARM_COMMON_MAGIC;
- armv4_5_info.core_mode = ARM_MODE_SVC;
- armv4_5_info.core_state = ARM_STATE_ARM;
+ arm_algo.common_magic = ARM_COMMON_MAGIC;
+ arm_algo.core_mode = ARM_MODE_SVC;
+ arm_algo.core_state = ARM_STATE_ARM;
init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT);
retval = armv4_5_run_algorithm_inner(target, 0, NULL, 1, reg_params,
arm7_9->dcc_working_area->address,
arm7_9->dcc_working_area->address + 6*4,
- 20*1000, &armv4_5_info, arm7_9_dcc_completion);
+ 20*1000, &arm_algo, arm7_9_dcc_completion);
if (retval == ERROR_OK) {
uint32_t endaddress = buf_get_u32(reg_params[0].value, 0, 32);
return ERROR_OK;
}
+int arm7_9_endianness_callback(jtag_callback_data_t pu8_in,
+ jtag_callback_data_t i_size, jtag_callback_data_t i_be,
+ jtag_callback_data_t i_flip)
+{
+ uint8_t *in = (uint8_t *)pu8_in;
+ int size = (int)i_size;
+ int be = (int)i_be;
+ int flip = (int)i_flip;
+ uint32_t readback;
+
+ switch (size) {
+ case 4:
+ readback = le_to_h_u32(in);
+ if (flip)
+ readback = flip_u32(readback, 32);
+ if (be)
+ h_u32_to_be(in, readback);
+ else
+ h_u32_to_le(in, readback);
+ break;
+ case 2:
+ readback = le_to_h_u16(in);
+ if (flip)
+ readback = flip_u32(readback, 16);
+ if (be)
+ h_u16_to_be(in, readback & 0xffff);
+ else
+ h_u16_to_le(in, readback & 0xffff);
+ break;
+ case 1:
+ readback = *in;
+ if (flip)
+ readback = flip_u32(readback, 8);
+ *in = readback & 0xff;
+ break;
+ }
+
+ return ERROR_OK;
+}
+
COMMAND_HANDLER(handle_arm7_9_dbgrq_command)
{
struct target *target = get_current_target(CMD_CTX);
arm7_9->dcc_downloads = false;
arm->arch_info = arm7_9;
+ arm->core_type = ARM_MODE_ANY;
arm->read_core_reg = arm7_9_read_core_reg;
arm->write_core_reg = arm7_9_write_core_reg;
arm->full_context = arm7_9_full_context;