#include "arm_simulator.h"
-int arm7_9_debug_entry(struct target *target);
+/**
+ * @file
+ * Hold common code supporting the ARM7 and ARM9 core generations.
+ *
+ * While the ARM core implementations evolved substantially during these
+ * two generations, they look quite similar from the JTAG perspective.
+ * Both have similar debug facilities, based on the same two scan chains
+ * providing access to the core and to an EmbeddedICE module. Both can
+ * support similar ETM and ETB modules, for tracing. And both expose
+ * what could be viewed as "ARM Classic", with multiple processor modes,
+ * shadowed registers, and support for the Thumb instruction set.
+ *
+ * Processor differences include things like presence or absence of MMU
+ * and cache, pipeline sizes, use of a modified Harvard Architecure
+ * (with separate instruction and data busses from the CPU), support
+ * for cpu clock gating during idle, and more.
+ */
+
+static int arm7_9_debug_entry(struct target *target);
/**
* Clear watchpoints for an ARM7/9 target.
return arm7_9_clear_watchpoints(arm7_9);
}
-/**
- * Retrieves the architecture information pointers for ARMv4/5 and ARM7/9
- * targets. A return of ERROR_OK signifies that the target is a valid target
- * and that the pointers have been set properly.
- *
- * @param target Pointer to the target device to get the pointers from
- * @param armv4_5_p Pointer to be filled in with the common struct for ARMV4/5
- * targets
- * @param arm7_9_p Pointer to be filled in with the common struct for ARM7/9
- * targets
- * @return ERROR_OK if successful
- */
-int arm7_9_get_arch_pointers(struct target *target, struct arm **armv4_5_p, struct arm7_9_common **arm7_9_p)
-{
- struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
-
- /* FIXME stop using this routine; just target_to_arm7_9() and
- * verify the resulting pointer using a replacement routine
- * that emits a usage message.
- */
- if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
- return ERROR_TARGET_INVALID;
-
- if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC)
- return ERROR_TARGET_INVALID;
-
- *armv4_5_p = armv4_5;
- *arm7_9_p = arm7_9;
-
- return ERROR_OK;
-}
-
/**
* Set either a hardware or software breakpoint on an ARM7/9 target. The
* breakpoint is set up even if it is already set. Some actions, e.g. reset,
* @param target Pointer to target that is entering debug mode
* @return Error code if anything fails, otherwise ERROR_OK
*/
-int arm7_9_debug_entry(struct target *target)
+static int arm7_9_debug_entry(struct target *target)
{
int i;
uint32_t context[16];
return ERROR_OK;
}
+/**
+ * Perform per-target setup that requires JTAG access.
+ */
+int arm7_9_examine(struct target *target)
+{
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+ int retval;
+
+ if (!target_was_examined(target)) {
+ struct reg_cache *t, **cache_p;
+
+ t = embeddedice_build_reg_cache(target, arm7_9);
+ if (t == NULL)
+ return ERROR_FAIL;
+
+ cache_p = register_get_last_cache_p(&target->reg_cache);
+ (*cache_p) = t;
+ arm7_9->eice_cache = (*cache_p);
+
+ if (arm7_9->armv4_5_common.etm)
+ (*cache_p)->next = etm_build_reg_cache(target,
+ &arm7_9->jtag_info,
+ arm7_9->armv4_5_common.etm);
+
+ target_set_examined(target);
+ }
+
+ retval = embeddedice_setup(target);
+ if (retval == ERROR_OK)
+ retval = arm7_9_setup(target);
+ if (retval == ERROR_OK && arm7_9->armv4_5_common.etm)
+ retval = etm_setup(target);
+ return retval;
+}
+
+
COMMAND_HANDLER(handle_arm7_9_write_xpsr_command)
{
uint32_t value;
int spsr;
int retval;
struct target *target = get_current_target(cmd_ctx);
- struct arm *armv4_5;
- struct arm7_9_common *arm7_9;
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ if (!is_arm7_9(arm7_9))
{
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
- return ERROR_OK;
+ return ERROR_TARGET_INVALID;
}
if (target->state != TARGET_HALTED)
{
command_print(cmd_ctx, "can't write registers while running");
- return ERROR_OK;
+ return ERROR_FAIL;
}
if (argc < 2)
{
command_print(cmd_ctx, "usage: write_xpsr <value> <not cpsr | spsr>");
- return ERROR_OK;
+ return ERROR_FAIL;
}
COMMAND_PARSE_NUMBER(u32, args[0], value);
int spsr;
int retval;
struct target *target = get_current_target(cmd_ctx);
- struct arm *armv4_5;
- struct arm7_9_common *arm7_9;
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ if (!is_arm7_9(arm7_9))
{
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
- return ERROR_OK;
+ return ERROR_TARGET_INVALID;
}
if (target->state != TARGET_HALTED)
{
command_print(cmd_ctx, "can't write registers while running");
- return ERROR_OK;
+ return ERROR_FAIL;
}
if (argc < 3)
{
command_print(cmd_ctx, "usage: write_xpsr_im8 <im8> <rotate> <not cpsr | spsr>");
- return ERROR_OK;
+ return ERROR_FAIL;
}
COMMAND_PARSE_NUMBER(u32, args[0], value);
uint32_t mode;
int num;
struct target *target = get_current_target(cmd_ctx);
- struct arm *armv4_5;
- struct arm7_9_common *arm7_9;
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ if (!is_arm7_9(arm7_9))
{
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
- return ERROR_OK;
+ return ERROR_TARGET_INVALID;
}
if (target->state != TARGET_HALTED)
{
command_print(cmd_ctx, "can't write registers while running");
- return ERROR_OK;
+ return ERROR_FAIL;
}
if (argc < 3)
{
command_print(cmd_ctx, "usage: write_core_reg <num> <mode> <value>");
- return ERROR_OK;
+ return ERROR_FAIL;
}
COMMAND_PARSE_NUMBER(int, args[0], num);
COMMAND_HANDLER(handle_arm7_9_dbgrq_command)
{
struct target *target = get_current_target(cmd_ctx);
- struct arm *armv4_5;
- struct arm7_9_common *arm7_9;
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ if (!is_arm7_9(arm7_9))
{
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
- return ERROR_OK;
+ return ERROR_TARGET_INVALID;
}
if (argc > 0)
COMMAND_HANDLER(handle_arm7_9_fast_memory_access_command)
{
struct target *target = get_current_target(cmd_ctx);
- struct arm *armv4_5;
- struct arm7_9_common *arm7_9;
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ if (!is_arm7_9(arm7_9))
{
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
- return ERROR_OK;
+ return ERROR_TARGET_INVALID;
}
if (argc > 0)
COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command)
{
struct target *target = get_current_target(cmd_ctx);
- struct arm *armv4_5;
- struct arm7_9_common *arm7_9;
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ if (!is_arm7_9(arm7_9))
{
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
- return ERROR_OK;
+ return ERROR_TARGET_INVALID;
}
if (argc > 0)
1, 1, target);
}
-int arm7_9_register_commands(struct command_context_s *cmd_ctx)
+int arm7_9_register_commands(struct command_context *cmd_ctx)
{
- command_t *arm7_9_cmd;
+ struct command *arm7_9_cmd;
arm7_9_cmd = register_command(cmd_ctx, NULL, "arm7_9",
NULL, COMMAND_ANY, "arm7/9 specific commands");