armv7m: add FPU registers support

[openocd.git] / src / target / arm7_9_common.c

diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 7687466f823d51284943e1420954870bda956fb6..617ee78406224922c3833e54017b8a383c75dbf2 100644 (file)
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -103,7 +103,7 @@ static void arm7_9_assign_wp(struct arm7_9_common *arm7_9, struct breakpoint *br
                arm7_9->wp_available--;
        } else
                LOG_ERROR("BUG: no hardware comparator available");
-       LOG_DEBUG("BPID: %d (0x%08" PRIx32 ") using hw wp: %d",
+       LOG_DEBUG("BPID: %" PRId32 " (0x%08" PRIx32 ") using hw wp: %d",
                        breakpoint->unique_id,
                        breakpoint->address,
                        breakpoint->set);
@@ -189,7 +189,7 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
        int retval = ERROR_OK;
 
-       LOG_DEBUG("BPID: %d, Address: 0x%08" PRIx32 ", Type: %d",
+       LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" PRIx32 ", Type: %d",
                breakpoint->unique_id,
                breakpoint->address,
                breakpoint->type);
@@ -301,7 +301,7 @@ static int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *bre
        int retval = ERROR_OK;
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
-       LOG_DEBUG("BPID: %d, Address: 0x%08" PRIx32,
+       LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" PRIx32,
                breakpoint->unique_id,
                breakpoint->address);
 
@@ -311,7 +311,7 @@ static int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *bre
        }
 
        if (breakpoint->type == BKPT_HARD) {
-               LOG_DEBUG("BPID: %d Releasing hw wp: %d",
+               LOG_DEBUG("BPID: %" PRId32 " Releasing hw wp: %d",
                        breakpoint->unique_id,
                        breakpoint->set);
                if (breakpoint->set == 1) {
@@ -1719,7 +1719,7 @@ int arm7_9_resume(struct target *target,
                breakpoint = breakpoint_find(target,
                                buf_get_u32(arm->pc->value, 0, 32));
                if (breakpoint != NULL) {
-                       LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 " (id: %d)",
+                       LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 " (id: %" PRId32,
                                breakpoint->address,
                                breakpoint->unique_id);
                        retval = arm7_9_unset_breakpoint(target, breakpoint);
@@ -2033,7 +2033,7 @@ static int arm7_9_read_core_reg(struct target *target, struct reg *r,
 }
 
 static int arm7_9_write_core_reg(struct target *target, struct reg *r,
-       int num, enum arm_mode mode, uint32_t value)
+       int num, enum arm_mode mode, uint8_t *value)
 {
        uint32_t reg[16];
        struct arm_reg *areg = r->arch_info;
@@ -2058,7 +2058,7 @@ static int arm7_9_write_core_reg(struct target *target, struct reg *r,
 
        if ((num >= 0) && (num <= 15)) {
                /* write a normal core register */
-               reg[num] = value;
+               reg[num] = buf_get_u32(value, 0, 32);
 
                arm7_9->write_core_regs(target, 1 << num, reg);
        } else {
@@ -2067,11 +2067,12 @@ static int arm7_9_write_core_reg(struct target *target, struct reg *r,
                */
                int spsr = (areg->mode != ARM_MODE_ANY);
 
+               uint32_t t = buf_get_u32(value, 0, 32);
                /* if we're writing the CPSR, mask the T bit */
                if (!spsr)
-                       value &= ~0x20;
+                       t &= ~0x20;
 
-               arm7_9->write_xpsr(target, value, spsr);
+               arm7_9->write_xpsr(target, t, spsr);
        }
 
        r->valid = 1;
@@ -2576,7 +2577,6 @@ int arm7_9_bulk_write_memory(struct target *target,
 {
        int retval;
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       int i;
 
        if (address % 4 != 0)
                return ERROR_TARGET_UNALIGNED_ACCESS;
@@ -2595,8 +2595,7 @@ int arm7_9_bulk_write_memory(struct target *target,
                }
 
                /* copy target instructions to target endianness */
-               for (i = 0; i < 6; i++)
-                       target_buffer_set_u32(target, dcc_code_buf + i*4, dcc_code[i]);
+               target_buffer_set_u32_array(target, dcc_code_buf, ARRAY_SIZE(dcc_code), dcc_code);
 
                /* write DCC code to working area, using the non-optimized
                 * memory write to avoid ending up here again */