Remove bogus "BUG:". If the PC is pointing to an invalid instruction, then simulation...

[openocd.git] / src / target / arm7_9_common.c

diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 79d91e7a3aa0b2c676cb7f11df44952c9365e587..7400f18122c081fa7178968b2766494f57ab2c17 100644 (file)
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -2,7 +2,7 @@
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
- *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
+ *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
  *   oyvind.harboe@zylin.com                                               *
  *                                                                         *
  *   Copyright (C) 2008 by Spencer Oliver                                  *
@@ -1015,6 +1015,9 @@ int arm7_9_assert_reset(target_t *target)
                {
                        /* program vector catch register to catch reset vector */
                        embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_VEC_CATCH], 0x1);
+
+                       /* extra runtest added as issues were found with certain ARM9 cores (maybe more) - AT91SAM9260 and STR9 */
+                       jtag_add_runtest(1, jtag_get_end_state());
                }
                else
                {
@@ -1431,18 +1434,10 @@ int arm7_9_debug_entry(target_t *target)
                context[15] -= 3 * 4;
        }
 
-       if ((target->debug_reason == DBG_REASON_BREAKPOINT)
-                       || (target->debug_reason == DBG_REASON_SINGLESTEP)
-                       || (target->debug_reason == DBG_REASON_WATCHPOINT)
-                       || (target->debug_reason == DBG_REASON_WPTANDBKPT)
-                       || ((target->debug_reason == DBG_REASON_DBGRQ) && (arm7_9->use_dbgrq == 0)))
+       if ((target->debug_reason != DBG_REASON_DBGRQ) || (!arm7_9->use_dbgrq))
                context[15] -= 3 * ((armv4_5->core_state == ARMV4_5_STATE_ARM) ? 4 : 2);
-       else if (target->debug_reason == DBG_REASON_DBGRQ)
-               context[15] -= arm7_9->dbgreq_adjust_pc * ((armv4_5->core_state == ARMV4_5_STATE_ARM) ? 4 : 2);
        else
-       {
-               LOG_ERROR("unknown debug reason: %i", target->debug_reason);
-       }
+               context[15] -= arm7_9->dbgreq_adjust_pc * ((armv4_5->core_state == ARMV4_5_STATE_ARM) ? 4 : 2);
 
        if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
                return ERROR_FAIL;
@@ -1838,7 +1833,7 @@ int arm7_9_resume(struct target_s *target, int current, uint32_t address, int ha
                        {
                                uint32_t current_opcode;
                                target_read_u32(target, current_pc, &current_opcode);
-                               LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8" PRIx32 "", current_opcode);
+                               LOG_ERROR("Couldn't calculate PC of next instruction, current opcode was 0x%8.8" PRIx32 "", current_opcode);
                                return retval;
                        }
 
@@ -2043,7 +2038,7 @@ int arm7_9_step(struct target_s *target, int current, uint32_t address, int hand
        {
                uint32_t current_opcode;
                target_read_u32(target, current_pc, &current_opcode);
-               LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8" PRIx32 "", current_opcode);
+               LOG_ERROR("Couldn't calculate PC of next instruction, current opcode was 0x%8.8" PRIx32 "", current_opcode);
                return retval;
        }