/* set RESTART instruction */
if (arm7_9->need_bypass_before_restart) {
arm7_9->need_bypass_before_restart = 0;
- retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info->tap, 0xf, NULL, TAP_IDLE);
if (retval != ERROR_OK)
return retval;
}
- retval = arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info->tap, 0x4, NULL, TAP_IDLE);
if (retval != ERROR_OK)
return retval;
/* set RESTART instruction */
if (arm7_9->need_bypass_before_restart) {
arm7_9->need_bypass_before_restart = 0;
- retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info->tap, 0xf, NULL, TAP_IDLE);
if (retval != ERROR_OK)
return retval;
}
- retval = arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info->tap, 0x4, NULL, TAP_IDLE);
if (retval != ERROR_OK)
return retval;
if (arm7_9->need_bypass_before_restart) {
arm7_9->need_bypass_before_restart = 0;
- retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info->tap, 0xf, NULL, TAP_IDLE);
if (retval != ERROR_OK)
return retval;
}
- retval = arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info->tap, 0x4, NULL, TAP_IDLE);
if (retval != ERROR_OK)
return retval;
}
static int arm7_9_write_core_reg(struct target *target, struct reg *r,
- int num, enum arm_mode mode, uint32_t value)
+ int num, enum arm_mode mode, uint8_t *value)
{
uint32_t reg[16];
struct arm_reg *areg = r->arch_info;
if ((num >= 0) && (num <= 15)) {
/* write a normal core register */
- reg[num] = value;
+ reg[num] = buf_get_u32(value, 0, 32);
arm7_9->write_core_regs(target, 1 << num, reg);
} else {
*/
int spsr = (areg->mode != ARM_MODE_ANY);
+ uint32_t t = buf_get_u32(value, 0, 32);
/* if we're writing the CPSR, mask the T bit */
if (!spsr)
- value &= ~0x20;
+ t &= ~0x20;
- arm7_9->write_xpsr(target, value, spsr);
+ arm7_9->write_xpsr(target, t, spsr);
}
r->valid = 1;