cortex_m: fix autoincrement range of Cortex-M7

[openocd.git] / src / target / arm7_9_common.c

diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 6b1a1731b8ff990f7d3e38aac249607bcb5c0484..c1d5c79445c8b14aa8ad14f7c57df42dd9c68032 100644 (file)
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -24,9 +24,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -350,12 +348,12 @@ static int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *bre
                        if (retval != ERROR_OK)
                                return retval;
                        current_instr = target_buffer_get_u16(target, (uint8_t *)&current_instr);
-                       if (current_instr == arm7_9->thumb_bkpt)
+                       if (current_instr == arm7_9->thumb_bkpt) {
                                retval = target_write_memory(target,
                                                breakpoint->address, 2, 1, breakpoint->orig_instr);
                                if (retval != ERROR_OK)
                                        return retval;
-
+                       }
                }
 
                if (--arm7_9->sw_breakpoint_count == 0) {
@@ -628,16 +626,16 @@ int arm7_9_execute_sys_speed(struct target *target)
        /* set RESTART instruction */
        if (arm7_9->need_bypass_before_restart) {
                arm7_9->need_bypass_before_restart = 0;
-               retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+               retval = arm_jtag_set_instr(jtag_info->tap, 0xf, NULL, TAP_IDLE);
                if (retval != ERROR_OK)
                        return retval;
        }
-       retval = arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+       retval = arm_jtag_set_instr(jtag_info->tap, 0x4, NULL, TAP_IDLE);
        if (retval != ERROR_OK)
                return retval;
 
-       long long then = timeval_ms();
-       int timeout;
+       int64_t then = timeval_ms();
+       bool timeout;
        while (!(timeout = ((timeval_ms()-then) > 1000))) {
                /* read debug status register */
                embeddedice_read_reg(dbg_stat);
@@ -682,11 +680,11 @@ static int arm7_9_execute_fast_sys_speed(struct target *target)
        /* set RESTART instruction */
        if (arm7_9->need_bypass_before_restart) {
                arm7_9->need_bypass_before_restart = 0;
-               retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+               retval = arm_jtag_set_instr(jtag_info->tap, 0xf, NULL, TAP_IDLE);
                if (retval != ERROR_OK)
                        return retval;
        }
-       retval = arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+       retval = arm_jtag_set_instr(jtag_info->tap, 0x4, NULL, TAP_IDLE);
        if (retval != ERROR_OK)
                return retval;
 
@@ -875,6 +873,13 @@ int arm7_9_assert_reset(struct target *target)
        enum reset_types jtag_reset_config = jtag_get_reset_config();
        bool use_event = false;
 
+       /* TODO: apply hw reset signal in not examined state */
+       if (!(target_was_examined(target))) {
+               LOG_WARNING("Reset is not asserted because the target is not examined.");
+               LOG_WARNING("Use a reset button or power cycle the target.");
+               return ERROR_TARGET_NOT_EXAMINED;
+       }
+
        LOG_DEBUG("target->state: %s", target_state_name(target));
 
        if (target_has_event_action(target, TARGET_EVENT_RESET_ASSERT))
@@ -1639,11 +1644,11 @@ static int arm7_9_restart_core(struct target *target)
        if (arm7_9->need_bypass_before_restart) {
                arm7_9->need_bypass_before_restart = 0;
 
-               retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+               retval = arm_jtag_set_instr(jtag_info->tap, 0xf, NULL, TAP_IDLE);
                if (retval != ERROR_OK)
                        return retval;
        }
-       retval = arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+       retval = arm_jtag_set_instr(jtag_info->tap, 0x4, NULL, TAP_IDLE);
        if (retval != ERROR_OK)
                return retval;
 
@@ -2033,7 +2038,7 @@ static int arm7_9_read_core_reg(struct target *target, struct reg *r,
 }
 
 static int arm7_9_write_core_reg(struct target *target, struct reg *r,
-       int num, enum arm_mode mode, uint32_t value)
+       int num, enum arm_mode mode, uint8_t *value)
 {
        uint32_t reg[16];
        struct arm_reg *areg = r->arch_info;
@@ -2058,7 +2063,7 @@ static int arm7_9_write_core_reg(struct target *target, struct reg *r,
 
        if ((num >= 0) && (num <= 15)) {
                /* write a normal core register */
-               reg[num] = value;
+               reg[num] = buf_get_u32(value, 0, 32);
 
                arm7_9->write_core_regs(target, 1 << num, reg);
        } else {
@@ -2067,11 +2072,12 @@ static int arm7_9_write_core_reg(struct target *target, struct reg *r,
                */
                int spsr = (areg->mode != ARM_MODE_ANY);
 
+               uint32_t t = buf_get_u32(value, 0, 32);
                /* if we're writing the CPSR, mask the T bit */
                if (!spsr)
-                       value &= ~0x20;
+                       t &= ~0x20;
 
-               arm7_9->write_xpsr(target, value, spsr);
+               arm7_9->write_xpsr(target, t, spsr);
        }
 
        r->valid = 1;
@@ -2576,7 +2582,6 @@ int arm7_9_bulk_write_memory(struct target *target,
 {
        int retval;
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       int i;
 
        if (address % 4 != 0)
                return ERROR_TARGET_UNALIGNED_ACCESS;
@@ -2595,8 +2600,7 @@ int arm7_9_bulk_write_memory(struct target *target,
                }
 
                /* copy target instructions to target endianness */
-               for (i = 0; i < 6; i++)
-                       target_buffer_set_u32(target, dcc_code_buf + i*4, dcc_code[i]);
+               target_buffer_set_u32_array(target, dcc_code_buf, ARRAY_SIZE(dcc_code), dcc_code);
 
                /* write DCC code to working area, using the non-optimized
                 * memory write to avoid ending up here again */