Code Review / openocd.git / blobdiff
? search:
summary | shortlog | log | commit | commitdiff | review | tree
raw | inline | side by side
ARM: memory utils aren't ARM7/ARM9 dependent
[openocd.git] / src / target / arm7_9_common.c
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 115a1d6bcb8ecef2377a89fac1b9b3072f1b102c..c35c8252b6a392e9913f86f8830765565d0ab36e 100644 (file)
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -2706,156 +2706,6 @@ int arm7_9_bulk_write_memory(struct target *target, uint32_t address, uint32_t c
        return retval;
 }
 
-int arm7_9_checksum_memory(struct target *target, uint32_t address, uint32_t count, uint32_t* checksum)
-{
-       struct working_area *crc_algorithm;
-       struct armv4_5_algorithm armv4_5_info;
-       struct reg_param reg_params[2];
-       int retval;
-
-       static const uint32_t arm7_9_crc_code[] = {
-               0xE1A02000,                             /* mov          r2, r0 */
-               0xE3E00000,                             /* mov          r0, #0xffffffff */
-               0xE1A03001,                             /* mov          r3, r1 */
-               0xE3A04000,                             /* mov          r4, #0 */
-               0xEA00000B,                             /* b            ncomp */
-                                                               /* nbyte: */
-               0xE7D21004,                             /* ldrb r1, [r2, r4] */
-               0xE59F7030,                             /* ldr          r7, CRC32XOR */
-               0xE0200C01,                             /* eor          r0, r0, r1, asl 24 */
-               0xE3A05000,                             /* mov          r5, #0 */
-                                                               /* loop: */
-               0xE3500000,                             /* cmp          r0, #0 */
-               0xE1A06080,                             /* mov          r6, r0, asl #1 */
-               0xE2855001,                             /* add          r5, r5, #1 */
-               0xE1A00006,                             /* mov          r0, r6 */
-               0xB0260007,                             /* eorlt        r0, r6, r7 */
-               0xE3550008,                             /* cmp          r5, #8 */
-               0x1AFFFFF8,                             /* bne          loop */
-               0xE2844001,                             /* add          r4, r4, #1 */
-                                                               /* ncomp: */
-               0xE1540003,                             /* cmp          r4, r3 */
-               0x1AFFFFF1,                             /* bne          nbyte */
-                                                               /* end: */
-               0xEAFFFFFE,                             /* b            end */
-               0x04C11DB7                              /* CRC32XOR:    .word 0x04C11DB7 */
-       };
-
-       uint32_t i;
-
-       if (target_alloc_working_area(target, sizeof(arm7_9_crc_code), &crc_algorithm) != ERROR_OK)
-       {
-               return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       }
-
-       /* convert flash writing code into a buffer in target endianness */
-       for (i = 0; i < (sizeof(arm7_9_crc_code)/sizeof(uint32_t)); i++)
-       {
-               if ((retval = target_write_u32(target, crc_algorithm->address + i*sizeof(uint32_t), arm7_9_crc_code[i])) != ERROR_OK)
-               {
-                       return retval;
-               }
-       }
-
-       armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
-       armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
-       armv4_5_info.core_state = ARMV4_5_STATE_ARM;
-
-       init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT);
-       init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
-
-       buf_set_u32(reg_params[0].value, 0, 32, address);
-       buf_set_u32(reg_params[1].value, 0, 32, count);
-
-       /* 20 second timeout/megabyte */
-       int timeout = 20000 * (1 + (count / (1024*1024)));
-
-       if ((retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
-               crc_algorithm->address, crc_algorithm->address + (sizeof(arm7_9_crc_code) - 8), timeout, &armv4_5_info)) != ERROR_OK)
-       {
-               LOG_ERROR("error executing arm7_9 crc algorithm");
-               destroy_reg_param(&reg_params[0]);
-               destroy_reg_param(&reg_params[1]);
-               target_free_working_area(target, crc_algorithm);
-               return retval;
-       }
-
-       *checksum = buf_get_u32(reg_params[0].value, 0, 32);
-
-       destroy_reg_param(&reg_params[0]);
-       destroy_reg_param(&reg_params[1]);
-
-       target_free_working_area(target, crc_algorithm);
-
-       return ERROR_OK;
-}
-
-int arm7_9_blank_check_memory(struct target *target, uint32_t address, uint32_t count, uint32_t* blank)
-{
-       struct working_area *erase_check_algorithm;
-       struct reg_param reg_params[3];
-       struct armv4_5_algorithm armv4_5_info;
-       int retval;
-       uint32_t i;
-
-       static const uint32_t erase_check_code[] =
-       {
-               /* loop: */
-               0xe4d03001,             /* ldrb r3, [r0], #1 */
-               0xe0022003,             /* and r2, r2, r3    */
-               0xe2511001,             /* subs r1, r1, #1   */
-               0x1afffffb,             /* bne loop          */
-               /* end: */
-               0xeafffffe              /* b end             */
-       };
-
-       /* make sure we have a working area */
-       if (target_alloc_working_area(target, sizeof(erase_check_code), &erase_check_algorithm) != ERROR_OK)
-       {
-               return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-       }
-
-       /* convert flash writing code into a buffer in target endianness */
-       for (i = 0; i < (sizeof(erase_check_code)/sizeof(uint32_t)); i++)
-               if ((retval = target_write_u32(target, erase_check_algorithm->address + i*sizeof(uint32_t), erase_check_code[i])) != ERROR_OK)
-               {
-                       return retval;
-               }
-
-       armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
-       armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
-       armv4_5_info.core_state = ARMV4_5_STATE_ARM;
-
-       init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
-       buf_set_u32(reg_params[0].value, 0, 32, address);
-
-       init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
-       buf_set_u32(reg_params[1].value, 0, 32, count);
-
-       init_reg_param(&reg_params[2], "r2", 32, PARAM_IN_OUT);
-       buf_set_u32(reg_params[2].value, 0, 32, 0xff);
-
-       if ((retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
-                       erase_check_algorithm->address, erase_check_algorithm->address + (sizeof(erase_check_code) - 4), 10000, &armv4_5_info)) != ERROR_OK)
-       {
-               destroy_reg_param(&reg_params[0]);
-               destroy_reg_param(&reg_params[1]);
-               destroy_reg_param(&reg_params[2]);
-               target_free_working_area(target, erase_check_algorithm);
-               return 0;
-       }
-
-       *blank = buf_get_u32(reg_params[2].value, 0, 32);
-
-       destroy_reg_param(&reg_params[0]);
-       destroy_reg_param(&reg_params[1]);
-       destroy_reg_param(&reg_params[2]);
-
-       target_free_working_area(target, erase_check_algorithm);
-
-       return ERROR_OK;
-}
-
 /**
  * Perform per-target setup that requires JTAG access.
  */
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)