#include "breakpoints.h"
#include "target.h"
-#include "etb.h"
+#include "etm.h"
#define ARM7_9_COMMON_MAGIC 0x0a790a79
arm_jtag_t jtag_info;
reg_cache_t *eice_cache;
- reg_cache_t *etm_cache;
u32 arm_bkpt;
u16 thumb_bkpt;
int dbgreq_adjust_pc;
int use_dbgrq;
- int has_etm;
- etb_t *etb;
+ etm_context_t *etm_ctx;
+
int has_single_step;
int has_monitor_mode;
int has_vector_catch;
int arm7_9_register_commands(struct command_context_s *cmd_ctx);
-enum target_state arm7_9_poll(target_t *target);
+int arm7_9_poll(target_t *target);
+
+int arm7_9_target_request_data(target_t *target, u32 size, u8 *buffer);
int arm7_9_assert_reset(target_t *target);
int arm7_9_deassert_reset(target_t *target);
int arm7_9_halt(target_t *target);
int arm7_9_debug_entry(target_t *target);
int arm7_9_full_context(target_t *target);
+int arm7_9_restore_context(target_t *target);
int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
int arm7_9_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode);
int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer);
+int arm7_9_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum);
int arm7_9_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_prams, reg_param_t *reg_param, u32 entry_point, void *arch_info);