Code Review / openocd.git / blobdiff
? search:
summary | shortlog | log | commit | commitdiff | review | tree
raw | inline | side by side
openocd: src/target: replace the GPL-2.0-or-later license tag
[openocd.git] / src / target / arm920t.c
diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index a45dc64201227d6f96e42ca2044dfdd8cae5a858..7b5fa81e67095a777b6c3a7f871fc80d8d056f7e 100644 (file)
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -1,20 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
 
 /***************************************************************************
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -799,11 +788,11 @@ int arm920t_soft_reset_halt(struct target *target)
 /* FIXME remove forward decls */
 static int arm920t_mrc(struct target *target, int cpnum,
                uint32_t op1, uint32_t op2,
-               uint32_t CRn, uint32_t CRm,
+               uint32_t crn, uint32_t crm,
                uint32_t *value);
 static int arm920t_mcr(struct target *target, int cpnum,
                uint32_t op1, uint32_t op2,
-               uint32_t CRn, uint32_t CRm,
+               uint32_t crn, uint32_t crm,
                uint32_t value);
 
 static int arm920t_init_arch_info(struct target *target,
@@ -873,7 +862,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
        uint32_t cp15_ctrl, cp15_ctrl_saved;
        uint32_t regs[16];
        uint32_t *regs_p[16];
-       uint32_t C15_C_D_Ind, C15_C_I_Ind;
+       uint32_t c15_c_d_ind, c15_c_i_ind;
        int i;
        FILE *output;
        int segment, index_t;
@@ -887,7 +876,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
                return ERROR_COMMAND_SYNTAX_ERROR;
 
        output = fopen(CMD_ARGV[0], "w");
-       if (output == NULL) {
+       if (!output) {
                LOG_DEBUG("error opening cache content file");
                return ERROR_OK;
        }
@@ -933,7 +922,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
 
                /* read current victim */
                arm920t_read_cp15_physical(target,
-                       CP15PHYS_DCACHE_IDX, &C15_C_D_Ind);
+                       CP15PHYS_DCACHE_IDX, &c15_c_d_ind);
 
                /* clear interpret mode */
                cp15c15 &= ~0x1;
@@ -992,7 +981,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
                }
 
                /* Ra: r0 = index(31:26):SBZ(25:8):segment(7:5):SBZ(4:0) */
-               regs[0] = 0x0 | (segment << 5) | (C15_C_D_Ind << 26);
+               regs[0] = 0x0 | (segment << 5) | (c15_c_d_ind << 26);
                arm9tdmi_write_core_regs(target, 0x1, regs);
 
                /* set interpret mode */
@@ -1034,7 +1023,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
 
                /* read current victim */
                arm920t_read_cp15_physical(target, CP15PHYS_ICACHE_IDX,
-                       &C15_C_I_Ind);
+                       &c15_c_i_ind);
 
                /* clear interpret mode */
                cp15c15 &= ~0x1;
@@ -1092,7 +1081,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
                }
 
                /* Ra: r0 = index(31:26):SBZ(25:8):segment(7:5):SBZ(4:0) */
-               regs[0] = 0x0 | (segment << 5) | (C15_C_D_Ind << 26);
+               regs[0] = 0x0 | (segment << 5) | (c15_c_d_ind << 26);
                arm9tdmi_write_core_regs(target, 0x1, regs);
 
                /* set interpret mode */
@@ -1156,7 +1145,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
        uint32_t *regs_p[16];
        int i;
        FILE *output;
-       uint32_t Dlockdown, Ilockdown;
+       uint32_t d_lockdown, i_lockdown;
        struct arm920t_tlb_entry d_tlb[64], i_tlb[64];
        int victim;
        struct reg *r;
@@ -1169,7 +1158,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
                return ERROR_COMMAND_SYNTAX_ERROR;
 
        output = fopen(CMD_ARGV[0], "w");
-       if (output == NULL) {
+       if (!output) {
                LOG_DEBUG("error opening mmu content file");
                return ERROR_OK;
        }
@@ -1213,13 +1202,13 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
        retval = jtag_execute_queue();
        if (retval != ERROR_OK)
                return retval;
-       Dlockdown = regs[1];
+       d_lockdown = regs[1];
 
        for (victim = 0; victim < 64; victim += 8) {
                /* new lockdown value: base[31:26]:victim[25:20]:SBZ[19:1]:p[0]
                 * base remains unchanged, victim goes through entries 0 to 63
                 */
-               regs[1] = (Dlockdown & 0xfc000000) | (victim << 20);
+               regs[1] = (d_lockdown & 0xfc000000) | (victim << 20);
                arm9tdmi_write_core_regs(target, 0x2, regs);
 
                /* set interpret mode */
@@ -1256,7 +1245,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
                /* new lockdown value: base[31:26]:victim[25:20]:SBZ[19:1]:p[0]
                 * base remains unchanged, victim goes through entries 0 to 63
                 */
-               regs[1] = (Dlockdown & 0xfc000000) | (victim << 20);
+               regs[1] = (d_lockdown & 0xfc000000) | (victim << 20);
                arm9tdmi_write_core_regs(target, 0x2, regs);
 
                /* set interpret mode */
@@ -1292,7 +1281,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
        }
 
        /* restore D TLB lockdown */
-       regs[1] = Dlockdown;
+       regs[1] = d_lockdown;
        arm9tdmi_write_core_regs(target, 0x2, regs);
 
        /* Write D TLB lockdown */
@@ -1319,13 +1308,13 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
        retval = jtag_execute_queue();
        if (retval != ERROR_OK)
                return retval;
-       Ilockdown = regs[1];
+       i_lockdown = regs[1];
 
        for (victim = 0; victim < 64; victim += 8) {
                /* new lockdown value: base[31:26]:victim[25:20]:SBZ[19:1]:p[0]
                 * base remains unchanged, victim goes through entries 0 to 63
                 */
-               regs[1] = (Ilockdown & 0xfc000000) | (victim << 20);
+               regs[1] = (i_lockdown & 0xfc000000) | (victim << 20);
                arm9tdmi_write_core_regs(target, 0x2, regs);
 
                /* set interpret mode */
@@ -1362,7 +1351,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
                /* new lockdown value: base[31:26]:victim[25:20]:SBZ[19:1]:p[0]
                 * base remains unchanged, victim goes through entries 0 to 63
                 */
-               regs[1] = (Dlockdown & 0xfc000000) | (victim << 20);
+               regs[1] = (d_lockdown & 0xfc000000) | (victim << 20);
                arm9tdmi_write_core_regs(target, 0x2, regs);
 
                /* set interpret mode */
@@ -1398,7 +1387,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
        }
 
        /* restore I TLB lockdown */
-       regs[1] = Ilockdown;
+       regs[1] = i_lockdown;
        arm9tdmi_write_core_regs(target, 0x2, regs);
 
        /* Write I TLB lockdown */
@@ -1528,7 +1517,7 @@ COMMAND_HANDLER(arm920t_handle_cache_info_command)
 
 static int arm920t_mrc(struct target *target, int cpnum,
        uint32_t op1, uint32_t op2,
-       uint32_t CRn, uint32_t CRm,
+       uint32_t crn, uint32_t crm,
        uint32_t *value)
 {
        if (cpnum != 15) {
@@ -1538,13 +1527,13 @@ static int arm920t_mrc(struct target *target, int cpnum,
 
        /* read "to" r0 */
        return arm920t_read_cp15_interpreted(target,
-               ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2),
+               ARMV4_5_MRC(cpnum, op1, 0, crn, crm, op2),
                0, value);
 }
 
 static int arm920t_mcr(struct target *target, int cpnum,
        uint32_t op1, uint32_t op2,
-       uint32_t CRn, uint32_t CRm,
+       uint32_t crn, uint32_t crm,
        uint32_t value)
 {
        if (cpnum != 15) {
@@ -1554,7 +1543,7 @@ static int arm920t_mcr(struct target *target, int cpnum,
 
        /* write "from" r0 */
        return arm920t_write_cp15_interpreted(target,
-               ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2),
+               ARMV4_5_MCR(cpnum, op1, 0, crn, crm, op2),
                0, value);
 }
 
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)