stlink: update to use ERROR_COMMAND_SYNTAX_ERROR
[openocd.git] / src / target / arm920t.c
index 90f548f38f0fbf6ee9d14a929ed037c1824478cb..f057d7b9b485eb3e101cfb221a354127955d47ab 100644 (file)
@@ -281,7 +281,10 @@ static int arm920t_read_cp15_interpreted(struct target *target,
 #endif
 
        if (!is_arm_mode(armv4_5->core_mode))
+       {
+               LOG_ERROR("not a valid arm core mode - communication failure?");
                return ERROR_FAIL;
+       }
 
        r[0].dirty = 1;
        r[1].dirty = 1;
@@ -323,7 +326,10 @@ int arm920t_write_cp15_interpreted(struct target *target,
 #endif
 
        if (!is_arm_mode(armv4_5->core_mode))
+       {
+               LOG_ERROR("not a valid arm core mode - communication failure?");
                return ERROR_FAIL;
+       }
 
        r[0].dirty = 1;
        r[1].dirty = 1;
@@ -527,7 +533,6 @@ int arm920t_arch_state(struct target *target)
        };
 
        struct arm920t_common *arm920t = target_to_arm920(target);
-       struct arm *armv4_5;
 
        if (arm920t->common_magic != ARM920T_COMMON_MAGIC)
        {
@@ -535,8 +540,6 @@ int arm920t_arch_state(struct target *target)
                return ERROR_TARGET_INVALID;
        }
 
-       armv4_5 = &arm920t->arm7_9_common.armv4_5_common;
-
        arm_arch_state(target);
        LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s",
                 state[arm920t->armv4_5_mmu.mmu_enabled],
@@ -596,7 +599,7 @@ static int arm920t_read_phys_memory(struct target *target,
 
 static int arm920t_write_phys_memory(struct target *target,
                uint32_t address, uint32_t size,
-               uint32_t count, uint8_t *buffer)
+               uint32_t count, const uint8_t *buffer)
 {
        struct arm920t_common *arm920t = target_to_arm920(target);
 
@@ -607,7 +610,7 @@ static int arm920t_write_phys_memory(struct target *target,
 
 /** Writes a buffer, in the specified word size, with current MMU settings. */
 int arm920t_write_memory(struct target *target, uint32_t address,
-               uint32_t size, uint32_t count, uint8_t *buffer)
+               uint32_t size, uint32_t count, const uint8_t *buffer)
 {
        int retval;
        const uint32_t cache_mask = ~0x1f; /* cache line size : 32 byte */
@@ -892,7 +895,6 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
        uint32_t C15_C_D_Ind, C15_C_I_Ind;
        int i;
        FILE *output;
-       struct arm920t_cache_line d_cache[8][64], i_cache[8][64];
        int segment, index_t;
        struct reg *r;
 
@@ -1001,8 +1003,6 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
                                return retval;
                        }
 
-                       d_cache[segment][index_t].cam = regs[9];
-
                        /* mask LFSR[6] */
                        regs[9] &= 0xfffffffe;
                        fprintf(output, "\nsegment: %i, index: %i, CAM: 0x%8.8"
@@ -1012,7 +1012,6 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
 
                        for (i = 1; i < 9; i++)
                        {
-                                d_cache[segment][index_t].data[i] = regs[i];
                                 fprintf(output, "%i: 0x%8.8" PRIx32 "\n",
                                                i-1, regs[i]);
                        }
@@ -1109,8 +1108,6 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
                                return retval;
                        }
 
-                       i_cache[segment][index_t].cam = regs[9];
-
                        /* mask LFSR[6] */
                        regs[9] &= 0xfffffffe;
                        fprintf(output, "\nsegment: %i, index: %i, "
@@ -1120,7 +1117,6 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
 
                        for (i = 1; i < 9; i++)
                        {
-                                i_cache[segment][index_t].data[i] = regs[i];
                                 fprintf(output, "%i: 0x%8.8" PRIx32 "\n",
                                                i-1, regs[i]);
                        }
@@ -1154,7 +1150,10 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
        fclose(output);
 
        if (!is_arm_mode(armv4_5->core_mode))
+       {
+               LOG_ERROR("not a valid arm core mode - communication failure?");
                return ERROR_FAIL;
+       }
 
        /* force writeback of the valid data */
        r = armv4_5->core_cache->reg_list;
@@ -1481,7 +1480,10 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
        fclose(output);
 
        if (!is_arm_mode(armv4_5->core_mode))
+       {
+               LOG_ERROR("not a valid arm core mode - communication failure?");
                return ERROR_FAIL;
+       }
 
        /* force writeback of the valid data */
        r = armv4_5->core_cache->reg_list;

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