retval = arm946e_write_cp15(target, 0x3a, cp15_idx);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR writing index\n");
+ LOG_DEBUG("ERROR writing index");
return retval;
}
retval = arm946e_write_cp15(target, 0x35, 0x1);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR cleaning cache line\n");
+ LOG_DEBUG("ERROR cleaning cache line");
return retval;
}
retval = arm946e_write_cp15(target, 0x1a, 0x1);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR flushing cache line\n");
+ LOG_DEBUG("ERROR flushing cache line");
return retval;
}
}
retval = arm946e_write_cp15(target, 0x0f, 0x1);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR flushing I$\n");
+ LOG_DEBUG("ERROR flushing I$");
return retval;
}
retval = arm946e_write_cp15(target, 0x02, ctr_reg);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR enabling cache\n");
+ LOG_DEBUG("ERROR enabling cache");
}
} /* if preserve_cache */
}
retval = arm946e_write_cp15(target, 0x3a, cp15_idx);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR writing index\n");
+ LOG_DEBUG("ERROR writing index");
return retval;
}
retval = arm946e_write_cp15(target, 0x35, 0x1);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR cleaning cache line\n");
+ LOG_DEBUG("ERROR cleaning cache line");
return retval;
}
retval = arm946e_write_cp15(target, 0x1c, 0x1);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR flushing cache line\n");
+ LOG_DEBUG("ERROR flushing cache line");
return retval;
}
retval = arm946e_write_cp15(target, 0x3a, cp15_idx);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR writing index\n");
+ LOG_DEBUG("ERROR writing index");
return retval;
}
retval = arm946e_write_cp15(target, 0x1d, 0x0);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR flushing cache line\n");
+ LOG_DEBUG("ERROR flushing cache line");
return retval;
}
/** Writes a buffer, in the specified word size, with current MMU settings. */
int arm946e_write_memory(struct target *target, uint32_t address,
- uint32_t size, uint32_t count, uint8_t *buffer)
+ uint32_t size, uint32_t count, const uint8_t *buffer)
{
int retval;