cleanup: rename armv4_5 to arm for readability
[openocd.git] / src / target / arm9tdmi.c
index 0749a56ed61de9fd8f92a252c6d5f7e21bb3561a..b3cd359dcf2f536c21ee740a54a3df703c36aaae 100644 (file)
@@ -60,7 +60,7 @@ enum arm9tdmi_vector_bit
 };
 
 static const struct arm9tdmi_vector {
-       char *name;
+       const char *name;
        uint32_t value;
 } arm9tdmi_vectors[] = {
        {"reset", ARM9TDMI_RESET_VECTOR},
@@ -103,7 +103,9 @@ int arm9tdmi_examine_debug_reason(struct target *target)
                {
                        return retval;
                }
-               arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL, TAP_DRPAUSE);
+               retval = arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL, TAP_DRPAUSE);
+               if (retval != ERROR_OK)
+                       return retval;
 
                jtag_add_dr_scan(arm7_9->jtag_info.tap, 3, fields, TAP_DRPAUSE);
                if ((retval = jtag_execute_queue()) != ERROR_OK)
@@ -157,7 +159,9 @@ int arm9tdmi_clock_out(struct arm_jtag *jtag_info, uint32_t instr,
                return retval;
        }
 
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+       retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+       if (retval != ERROR_OK)
+               return retval;
 
        fields[0].num_bits = 32;
        fields[0].out_value = out_buf;
@@ -215,7 +219,9 @@ int arm9tdmi_clock_data_in(struct arm_jtag *jtag_info, uint32_t *in)
                return retval;
        }
 
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+       retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+       if (retval != ERROR_OK)
+               return retval;
 
        fields[0].num_bits = 32;
        fields[0].out_value = NULL;
@@ -281,11 +287,13 @@ int arm9tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
                return retval;
        }
 
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+       retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+       if (retval != ERROR_OK)
+               return retval;
 
        fields[0].num_bits = 32;
        fields[0].out_value = NULL;
-       jtag_alloc_in_value32(&fields[0]);
+       fields[0].in_value = in;
 
        fields[1].num_bits = 3;
        fields[1].out_value = NULL;
@@ -297,7 +305,11 @@ int arm9tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
 
        jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_DRPAUSE);
 
-       jtag_add_callback4(arm9endianness, (jtag_callback_data_t)in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
+       jtag_add_callback4(arm9endianness,
+               (jtag_callback_data_t)in,
+               (jtag_callback_data_t)size,
+               (jtag_callback_data_t)be,
+               (jtag_callback_data_t)in);
 
        jtag_add_runtest(0, TAP_DRPAUSE);
 
@@ -646,7 +658,7 @@ static void arm9tdmi_branch_resume_thumb(struct target *target)
        LOG_DEBUG("-");
 
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       struct arm *armv4_5 = &arm7_9->armv4_5_common;
+       struct arm *arm = &arm7_9->arm;
        struct arm_jtag *jtag_info = &arm7_9->jtag_info;
        struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
 
@@ -661,7 +673,7 @@ static void arm9tdmi_branch_resume_thumb(struct target *target)
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
        /* nothing fetched, LDM in EXECUTE stage (2nd cycle) */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP,
-                       buf_get_u32(armv4_5->pc->value, 0, 32) | 1, NULL, 0);
+                       buf_get_u32(arm->pc->value, 0, 32) | 1, NULL, 0);
        /* nothing fetched, LDM in EXECUTE stage (3rd cycle) */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 
@@ -688,7 +700,8 @@ static void arm9tdmi_branch_resume_thumb(struct target *target)
        /* fetch NOP, LDR in Execute */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, 0, NULL, 0);
        /* nothing fetched, LDR in EXECUTE stage (2nd cycle) */
-       arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, buf_get_u32(armv4_5->core_cache->reg_list[0].value, 0, 32), NULL, 0);
+       arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP,
+                       buf_get_u32(arm->core_cache->reg_list[0].value, 0, 32), NULL, 0);
        /* nothing fetched, LDR in EXECUTE stage (3rd cycle) */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, 0, NULL, 0);
 
@@ -734,9 +747,9 @@ void arm9tdmi_disable_single_step(struct target *target)
 static void arm9tdmi_build_reg_cache(struct target *target)
 {
        struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
-       struct arm *armv4_5 = target_to_arm(target);
+       struct arm *arm = target_to_arm(target);
 
-       (*cache_p) = arm_build_reg_cache(target, armv4_5);
+       (*cache_p) = arm_build_reg_cache(target, arm);
 }
 
 int arm9tdmi_init_target(struct command_context *cmd_ctx,
@@ -805,7 +818,7 @@ static int arm9tdmi_target_create(struct target *target, Jim_Interp *interp)
        struct arm7_9_common *arm7_9 = calloc(1,sizeof(struct arm7_9_common));
 
        arm9tdmi_init_arch_info(target, arm7_9, target->tap);
-       arm7_9->armv4_5_common.is_armv4 = true;
+       arm7_9->arm.is_armv4 = true;
 
        return ERROR_OK;
 }
@@ -915,6 +928,7 @@ const struct command_registration arm9tdmi_command_handlers[] = {
                .name = "arm9",
                .mode = COMMAND_ANY,
                .help = "arm9 command group",
+               .usage = "",
                .chain = arm9tdmi_exec_command_handlers,
        },
        COMMAND_REGISTRATION_DONE

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