Code Review / openocd.git / blobdiff
? search:
summary | shortlog | log | commit | commitdiff | review | tree
raw | inline | side by side
cleanup: rename armv4_5 to arm for readability
[openocd.git] / src / target / arm9tdmi.c
diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index f0911880bb0c486591763dfbf7020e5021b8de69..b3cd359dcf2f536c21ee740a54a3df703c36aaae 100644 (file)
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -60,7 +60,7 @@ enum arm9tdmi_vector_bit
 };
 
 static const struct arm9tdmi_vector {
-       char *name;
+       const char *name;
        uint32_t value;
 } arm9tdmi_vectors[] = {
        {"reset", ARM9TDMI_RESET_VECTOR},
@@ -87,8 +87,6 @@ int arm9tdmi_examine_debug_reason(struct target *target)
                uint8_t instructionbus[4];
                uint8_t debug_reason;
 
-               jtag_set_end_state(TAP_DRPAUSE);
-
                fields[0].num_bits = 32;
                fields[0].out_value = NULL;
                fields[0].in_value = databus;
@@ -101,11 +99,13 @@ int arm9tdmi_examine_debug_reason(struct target *target)
                fields[2].out_value = NULL;
                fields[2].in_value = instructionbus;
 
-               if ((retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1)) != ERROR_OK)
+               if ((retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
                {
                        return retval;
                }
-               arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
+               retval = arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL, TAP_DRPAUSE);
+               if (retval != ERROR_OK)
+                       return retval;
 
                jtag_add_dr_scan(arm7_9->jtag_info.tap, 3, fields, TAP_DRPAUSE);
                if ((retval = jtag_execute_queue()) != ERROR_OK)
@@ -154,13 +154,14 @@ int arm9tdmi_clock_out(struct arm_jtag *jtag_info, uint32_t instr,
        if (sysspeed)
                buf_set_u32(&sysspeed_buf, 2, 1, 1);
 
-       jtag_set_end_state(TAP_DRPAUSE);
-       if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+       if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
        {
                return retval;
        }
 
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
+       retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+       if (retval != ERROR_OK)
+               return retval;
 
        fields[0].num_bits = 32;
        fields[0].out_value = out_buf;
@@ -186,7 +187,7 @@ int arm9tdmi_clock_out(struct arm_jtag *jtag_info, uint32_t instr,
                jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_DRPAUSE);
        }
 
-       jtag_add_runtest(0, jtag_get_end_state());
+       jtag_add_runtest(0, TAP_DRPAUSE);
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
        {
@@ -213,13 +214,14 @@ int arm9tdmi_clock_data_in(struct arm_jtag *jtag_info, uint32_t *in)
        int retval = ERROR_OK;;
        struct scan_field fields[3];
 
-       jtag_set_end_state(TAP_DRPAUSE);
-       if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+       if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
        {
                return retval;
        }
 
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
+       retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+       if (retval != ERROR_OK)
+               return retval;
 
        fields[0].num_bits = 32;
        fields[0].out_value = NULL;
@@ -280,17 +282,18 @@ int arm9tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
        int retval = ERROR_OK;
        struct scan_field fields[3];
 
-       jtag_set_end_state(TAP_DRPAUSE);
-       if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+       if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
        {
                return retval;
        }
 
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
+       retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+       if (retval != ERROR_OK)
+               return retval;
 
        fields[0].num_bits = 32;
        fields[0].out_value = NULL;
-       jtag_alloc_in_value32(&fields[0]);
+       fields[0].in_value = in;
 
        fields[1].num_bits = 3;
        fields[1].out_value = NULL;
@@ -302,7 +305,11 @@ int arm9tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
 
        jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_DRPAUSE);
 
-       jtag_add_callback4(arm9endianness, (jtag_callback_data_t)in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
+       jtag_add_callback4(arm9endianness,
+               (jtag_callback_data_t)in,
+               (jtag_callback_data_t)size,
+               (jtag_callback_data_t)be,
+               (jtag_callback_data_t)in);
 
        jtag_add_runtest(0, TAP_DRPAUSE);
 
@@ -651,7 +658,7 @@ static void arm9tdmi_branch_resume_thumb(struct target *target)
        LOG_DEBUG("-");
 
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       struct arm *armv4_5 = &arm7_9->armv4_5_common;
+       struct arm *arm = &arm7_9->arm;
        struct arm_jtag *jtag_info = &arm7_9->jtag_info;
        struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
 
@@ -666,7 +673,7 @@ static void arm9tdmi_branch_resume_thumb(struct target *target)
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
        /* nothing fetched, LDM in EXECUTE stage (2nd cycle) */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP,
-                       buf_get_u32(armv4_5->pc->value, 0, 32) | 1, NULL, 0);
+                       buf_get_u32(arm->pc->value, 0, 32) | 1, NULL, 0);
        /* nothing fetched, LDM in EXECUTE stage (3rd cycle) */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 
@@ -693,7 +700,8 @@ static void arm9tdmi_branch_resume_thumb(struct target *target)
        /* fetch NOP, LDR in Execute */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, 0, NULL, 0);
        /* nothing fetched, LDR in EXECUTE stage (2nd cycle) */
-       arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, buf_get_u32(armv4_5->core_cache->reg_list[0].value, 0, 32), NULL, 0);
+       arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP,
+                       buf_get_u32(arm->core_cache->reg_list[0].value, 0, 32), NULL, 0);
        /* nothing fetched, LDR in EXECUTE stage (3rd cycle) */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, 0, NULL, 0);
 
@@ -739,9 +747,9 @@ void arm9tdmi_disable_single_step(struct target *target)
 static void arm9tdmi_build_reg_cache(struct target *target)
 {
        struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
-       struct arm *armv4_5 = target_to_arm(target);
+       struct arm *arm = target_to_arm(target);
 
-       (*cache_p) = arm_build_reg_cache(target, armv4_5);
+       (*cache_p) = arm_build_reg_cache(target, arm);
 }
 
 int arm9tdmi_init_target(struct command_context *cmd_ctx,
@@ -810,7 +818,7 @@ static int arm9tdmi_target_create(struct target *target, Jim_Interp *interp)
        struct arm7_9_common *arm7_9 = calloc(1,sizeof(struct arm7_9_common));
 
        arm9tdmi_init_arch_info(target, arm7_9, target->tap);
-       arm7_9->armv4_5_common.is_armv4 = true;
+       arm7_9->arm.is_armv4 = true;
 
        return ERROR_OK;
 }
@@ -917,9 +925,10 @@ const struct command_registration arm9tdmi_command_handlers[] = {
                .chain = arm7_9_command_handlers,
        },
        {
-               .name = "arm9tdmi",
+               .name = "arm9",
                .mode = COMMAND_ANY,
-               .help = "arm9tdmi command group",
+               .help = "arm9 command group",
+               .usage = "",
                .chain = arm9tdmi_exec_command_handlers,
        },
        COMMAND_REGISTRATION_DONE
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)