ETM: simplify ETM initialization code paths
[openocd.git] / src / target / arm9tdmi.c
index 58b8efd001642bc07ee37a21fc3a8f5502186887..fc110733e015451e1b58df987234d66dbf253ab9 100644 (file)
@@ -45,7 +45,7 @@
 #define _DEBUG_INSTRUCTION_EXECUTION_
 #endif
 
-static const arm9tdmi_vector_t arm9tdmi_vectors[] =
+static const struct arm9tdmi_vector arm9tdmi_vectors[] =
 {
        {"reset", ARM9TDMI_RESET_VECTOR},
        {"undef", ARM9TDMI_UNDEF_VECTOR},
@@ -57,16 +57,16 @@ static const arm9tdmi_vector_t arm9tdmi_vectors[] =
        {0, 0},
 };
 
-int arm9tdmi_examine_debug_reason(target_t *target)
+int arm9tdmi_examine_debug_reason(struct target *target)
 {
        int retval = ERROR_OK;
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
        /* only check the debug reason if we don't know it already */
        if ((target->debug_reason != DBG_REASON_DBGRQ)
                        && (target->debug_reason != DBG_REASON_SINGLESTEP))
        {
-               scan_field_t fields[3];
+               struct scan_field fields[3];
                uint8_t databus[4];
                uint8_t instructionbus[4];
                uint8_t debug_reason;
@@ -124,11 +124,11 @@ int arm9tdmi_examine_debug_reason(target_t *target)
 /* put an instruction in the ARM9TDMI pipeline or write the data bus,
  * and optionally read data
  */
-int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr,
+int arm9tdmi_clock_out(struct arm_jtag *jtag_info, uint32_t instr,
                uint32_t out, uint32_t *in, int sysspeed)
 {
        int retval = ERROR_OK;
-       scan_field_t fields[3];
+       struct scan_field fields[3];
        uint8_t out_buf[4];
        uint8_t instr_buf[4];
        uint8_t sysspeed_buf = 0x0;
@@ -198,10 +198,10 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr,
 }
 
 /* just read data (instruction and data-out = don't care) */
-int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in)
+int arm9tdmi_clock_data_in(struct arm_jtag *jtag_info, uint32_t *in)
 {
        int retval = ERROR_OK;;
-       scan_field_t fields[3];
+       struct scan_field fields[3];
 
        jtag_set_end_state(TAP_DRPAUSE);
        if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
@@ -269,11 +269,11 @@ static int arm9endianness(jtag_callback_data_t arg,
  * the *in pointer points to a buffer where elements of 'size' bytes
  * are stored in big (be == 1) or little (be == 0) endianness
  */
-int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info,
+int arm9tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
                void *in, int size, int be)
 {
        int retval = ERROR_OK;
-       scan_field_t fields[3];
+       struct scan_field fields[3];
 
        jtag_set_end_state(TAP_DRPAUSE);
        if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
@@ -325,12 +325,12 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info,
        return ERROR_OK;
 }
 
-static void arm9tdmi_change_to_arm(target_t *target,
+static void arm9tdmi_change_to_arm(struct target *target,
                uint32_t *r0, uint32_t *pc)
 {
        int retval = ERROR_OK;
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* save r0 before using it and put system in ARM state
         * to allow common handling of ARM and THUMB debugging */
@@ -379,12 +379,12 @@ static void arm9tdmi_change_to_arm(target_t *target,
        *pc -= 0xc;
 }
 
-void arm9tdmi_read_core_regs(target_t *target,
+void arm9tdmi_read_core_regs(struct target *target,
                uint32_t mask, uint32_t* core_regs[16])
 {
        int i;
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* STMIA r0-15, [r0] at debug speed
         * register values will start to appear on 4th DCLK
@@ -404,12 +404,12 @@ void arm9tdmi_read_core_regs(target_t *target,
        }
 }
 
-static void arm9tdmi_read_core_regs_target_buffer(target_t *target,
+static void arm9tdmi_read_core_regs_target_buffer(struct target *target,
                uint32_t mask, void* buffer, int size)
 {
        int i;
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
        int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
        uint32_t *buf_u32 = buffer;
        uint16_t *buf_u16 = buffer;
@@ -444,10 +444,10 @@ static void arm9tdmi_read_core_regs_target_buffer(target_t *target,
        }
 }
 
-static void arm9tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
+static void arm9tdmi_read_xpsr(struct target *target, uint32_t *xpsr, int spsr)
 {
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* MRS r0, cpsr */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_MRS(0, spsr & 1), 0, NULL, 0);
@@ -466,10 +466,10 @@ static void arm9tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, xpsr, 0);
 }
 
-static void arm9tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
+static void arm9tdmi_write_xpsr(struct target *target, uint32_t xpsr, int spsr)
 {
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        LOG_DEBUG("xpsr: %8.8" PRIx32 ", spsr: %i", xpsr, spsr);
 
@@ -500,11 +500,11 @@ static void arm9tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-static void arm9tdmi_write_xpsr_im8(target_t *target,
+static void arm9tdmi_write_xpsr_im8(struct target *target,
                uint8_t xpsr_im, int rot, int spsr)
 {
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        LOG_DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr);
 
@@ -525,12 +525,12 @@ static void arm9tdmi_write_xpsr_im8(target_t *target,
        }
 }
 
-void arm9tdmi_write_core_regs(target_t *target,
+void arm9tdmi_write_core_regs(struct target *target,
                uint32_t mask, uint32_t core_regs[16])
 {
        int i;
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* LDMIA r0-15, [r0] at debug speed
        * register values will start to appear on 4th DCLK
@@ -551,70 +551,70 @@ void arm9tdmi_write_core_regs(target_t *target,
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-void arm9tdmi_load_word_regs(target_t *target, uint32_t mask)
+void arm9tdmi_load_word_regs(struct target *target, uint32_t mask)
 {
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* put system-speed load-multiple into the pipeline */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_LDMIA(0, mask & 0xffff, 0, 1), 0, NULL, 0);
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-void arm9tdmi_load_hword_reg(target_t *target, int num)
+void arm9tdmi_load_hword_reg(struct target *target, int num)
 {
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* put system-speed load half-word into the pipeline */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_LDRH_IP(num, 0), 0, NULL, 0);
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-void arm9tdmi_load_byte_reg(target_t *target, int num)
+void arm9tdmi_load_byte_reg(struct target *target, int num)
 {
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* put system-speed load byte into the pipeline */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_LDRB_IP(num, 0), 0, NULL, 0);
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-void arm9tdmi_store_word_regs(target_t *target, uint32_t mask)
+void arm9tdmi_store_word_regs(struct target *target, uint32_t mask)
 {
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* put system-speed store-multiple into the pipeline */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask, 0, 1), 0, NULL, 0);
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-void arm9tdmi_store_hword_reg(target_t *target, int num)
+void arm9tdmi_store_hword_reg(struct target *target, int num)
 {
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* put system-speed store half-word into the pipeline */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_STRH_IP(num, 0), 0, NULL, 0);
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-void arm9tdmi_store_byte_reg(target_t *target, int num)
+void arm9tdmi_store_byte_reg(struct target *target, int num)
 {
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* put system-speed store byte into the pipeline */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_STRB_IP(num, 0), 0, NULL, 0);
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-static void arm9tdmi_write_pc(target_t *target, uint32_t pc)
+static void arm9tdmi_write_pc(struct target *target, uint32_t pc)
 {
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* LDMIA r0-15, [r0] at debug speed
         * register values will start to appear on 4th DCLK
@@ -635,23 +635,23 @@ static void arm9tdmi_write_pc(target_t *target, uint32_t pc)
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-void arm9tdmi_branch_resume(target_t *target)
+void arm9tdmi_branch_resume(struct target *target)
 {
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        arm9tdmi_clock_out(jtag_info, ARMV4_5_B(0xfffffc, 0), 0, NULL, 0);
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
 }
 
-static void arm9tdmi_branch_resume_thumb(target_t *target)
+static void arm9tdmi_branch_resume_thumb(struct target *target)
 {
        LOG_DEBUG("-");
 
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
        struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
-       reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
+       struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
 
        /* LDMIA r0-15, [r0] at debug speed
        * register values will start to appear on 4th DCLK
@@ -703,9 +703,9 @@ static void arm9tdmi_branch_resume_thumb(target_t *target)
        arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, 0, NULL, 0);
 }
 
-void arm9tdmi_enable_single_step(target_t *target, uint32_t next_pc)
+void arm9tdmi_enable_single_step(struct target *target, uint32_t next_pc)
 {
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
        if (arm7_9->has_single_step)
        {
@@ -718,9 +718,9 @@ void arm9tdmi_enable_single_step(target_t *target, uint32_t next_pc)
        }
 }
 
-void arm9tdmi_disable_single_step(target_t *target)
+void arm9tdmi_disable_single_step(struct target *target)
 {
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
        if (arm7_9->has_single_step)
        {
@@ -733,24 +733,24 @@ void arm9tdmi_disable_single_step(target_t *target)
        }
 }
 
-static void arm9tdmi_build_reg_cache(target_t *target)
+static void arm9tdmi_build_reg_cache(struct target *target)
 {
-       reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
+       struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
        struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
 
        (*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
        armv4_5->core_cache = (*cache_p);
 }
 
-int arm9tdmi_examine(struct target_s *target)
+int arm9tdmi_examine(struct target *target)
 {
        int retval;
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
        if (!target_was_examined(target))
        {
-               reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
-               reg_cache_t *t;
+               struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
+               struct reg_cache *t;
                /* one extra register (vector catch) */
                t = embeddedice_build_reg_cache(target, arm7_9);
                if (t == NULL)
@@ -759,12 +759,10 @@ int arm9tdmi_examine(struct target_s *target)
                arm7_9->eice_cache = (*cache_p);
 
                if (arm7_9->armv4_5_common.etm)
-               {
-                       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
                        (*cache_p)->next = etm_build_reg_cache(target,
-                                       jtag_info, arm7_9->armv4_5_common.etm);
-                       arm7_9->armv4_5_common.etm->reg_cache = (*cache_p)->next;
-               }
+                                       &arm7_9->jtag_info,
+                                       arm7_9->armv4_5_common.etm);
+
                target_set_examined(target);
        }
        if ((retval = embeddedice_setup(target)) != ERROR_OK)
@@ -779,17 +777,17 @@ int arm9tdmi_examine(struct target_s *target)
        return ERROR_OK;
 }
 
-int arm9tdmi_init_target(struct command_context_s *cmd_ctx,
-               struct target_s *target)
+int arm9tdmi_init_target(struct command_context *cmd_ctx,
+               struct target *target)
 {
        arm9tdmi_build_reg_cache(target);
        return ERROR_OK;
 }
 
-int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap)
+int arm9tdmi_init_arch_info(struct target *target, struct arm9tdmi_common *arm9tdmi, struct jtag_tap *tap)
 {
-       armv4_5_common_t *armv4_5;
-       arm7_9_common_t *arm7_9;
+       struct arm *armv4_5;
+       struct arm7_9_common *arm7_9;
 
        arm7_9 = &arm9tdmi->arm7_9_common;
        armv4_5 = &arm7_9->armv4_5_common;
@@ -846,9 +844,9 @@ int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_
        return ERROR_OK;
 }
 
-static int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm9tdmi_target_create(struct target *target, Jim_Interp *interp)
 {
-       arm9tdmi_common_t *arm9tdmi = calloc(1,sizeof(arm9tdmi_common_t));
+       struct arm9tdmi_common *arm9tdmi = calloc(1,sizeof(struct arm9tdmi_common));
 
        arm9tdmi_init_arch_info(target, arm9tdmi, target->tap);
        arm9tdmi->arm7_9_common.armv4_5_common.is_armv4 = true;
@@ -856,14 +854,12 @@ static int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp)
        return ERROR_OK;
 }
 
-static int handle_arm9tdmi_catch_vectors_command(
-       struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command)
 {
-       target_t *target = get_current_target(cmd_ctx);
-       struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
-       reg_t *vector_catch;
+       struct target *target = get_current_target(cmd_ctx);
+       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+       struct reg *vector_catch;
        uint32_t vector_catch_value;
-       int i, j;
 
        /* it's uncommon, but some ARM7 chips can support this */
        if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC
@@ -895,9 +891,10 @@ static int handle_arm9tdmi_catch_vectors_command(
                }
                else
                {
-                       for (i = 0; i < argc; i++)
+                       for (unsigned i = 0; i < argc; i++)
                        {
                                /* go through list of vectors */
+                               unsigned j;
                                for (j = 0; arm9tdmi_vectors[j].name; j++)
                                {
                                        if (strcmp(args[i], arm9tdmi_vectors[j].name) == 0)
@@ -928,7 +925,7 @@ static int handle_arm9tdmi_catch_vectors_command(
        }
 
        /* output current settings */
-       for (i = 0; arm9tdmi_vectors[i].name; i++) {
+       for (unsigned i = 0; arm9tdmi_vectors[i].name; i++) {
                command_print(cmd_ctx, "%s: %s", arm9tdmi_vectors[i].name,
                        (vector_catch_value & arm9tdmi_vectors[i].value)
                                ? "catch" : "don't catch");
@@ -937,10 +934,10 @@ static int handle_arm9tdmi_catch_vectors_command(
        return ERROR_OK;
 }
 
-int arm9tdmi_register_commands(struct command_context_s *cmd_ctx)
+int arm9tdmi_register_commands(struct command_context *cmd_ctx)
 {
        int retval;
-       command_t *arm9tdmi_cmd;
+       struct command *arm9tdmi_cmd;
 
        retval = arm7_9_register_commands(cmd_ctx);
        arm9tdmi_cmd = register_command(cmd_ctx, NULL, "arm9",
@@ -954,7 +951,7 @@ int arm9tdmi_register_commands(struct command_context_s *cmd_ctx)
 }
 
 /** Holds methods for ARM9TDMI targets. */
-target_type_t arm9tdmi_target =
+struct target_type arm9tdmi_target =
 {
        .name = "arm9tdmi",
 

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