Code Review / openocd.git / blobdiff
? search:
summary | shortlog | log | commit | commitdiff | review | tree
raw | inline | side by side
propagate return status of set_breakpoint() up call chain
[openocd.git] / src / target / arm9tdmi.c
diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index 10f88f7714901701d3d9c8b686f2a20953e7883f..fd5070314b30ccd08b94050ad5a6e8272d63b572 100644 (file)
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -30,6 +30,7 @@
 #include "arm9tdmi.h"
 #include "target_type.h"
 #include "register.h"
+#include "arm_opcodes.h"
 
 
 /*
@@ -86,30 +87,27 @@ int arm9tdmi_examine_debug_reason(struct target *target)
                uint8_t instructionbus[4];
                uint8_t debug_reason;
 
-               jtag_set_end_state(TAP_DRPAUSE);
-
-               fields[0].tap = arm7_9->jtag_info.tap;
                fields[0].num_bits = 32;
                fields[0].out_value = NULL;
                fields[0].in_value = databus;
 
-               fields[1].tap = arm7_9->jtag_info.tap;
                fields[1].num_bits = 3;
                fields[1].out_value = NULL;
                fields[1].in_value = &debug_reason;
 
-               fields[2].tap = arm7_9->jtag_info.tap;
                fields[2].num_bits = 32;
                fields[2].out_value = NULL;
                fields[2].in_value = instructionbus;
 
-               if ((retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1)) != ERROR_OK)
+               if ((retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
                {
                        return retval;
                }
-               arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
+               retval = arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL, TAP_DRPAUSE);
+               if (retval != ERROR_OK)
+                       return retval;
 
-               jtag_add_dr_scan(3, fields, jtag_set_end_state(TAP_DRPAUSE));
+               jtag_add_dr_scan(arm7_9->jtag_info.tap, 3, fields, TAP_DRPAUSE);
                if ((retval = jtag_execute_queue()) != ERROR_OK)
                {
                        return retval;
@@ -122,7 +120,7 @@ int arm9tdmi_examine_debug_reason(struct target *target)
                fields[2].in_value = NULL;
                fields[2].out_value = instructionbus;
 
-               jtag_add_dr_scan(3, fields, jtag_set_end_state(TAP_DRPAUSE));
+               jtag_add_dr_scan(arm7_9->jtag_info.tap, 3, fields, TAP_DRPAUSE);
 
                if (debug_reason & 0x4)
                        if (debug_reason & 0x2)
@@ -156,25 +154,23 @@ int arm9tdmi_clock_out(struct arm_jtag *jtag_info, uint32_t instr,
        if (sysspeed)
                buf_set_u32(&sysspeed_buf, 2, 1, 1);
 
-       jtag_set_end_state(TAP_DRPAUSE);
-       if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+       if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
        {
                return retval;
        }
 
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
+       retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+       if (retval != ERROR_OK)
+               return retval;
 
-       fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = out_buf;
        fields[0].in_value = NULL;
 
-       fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 3;
        fields[1].out_value = &sysspeed_buf;
        fields[1].in_value = NULL;
 
-       fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 32;
        fields[2].out_value = instr_buf;
        fields[2].in_value = NULL;
@@ -182,16 +178,16 @@ int arm9tdmi_clock_out(struct arm_jtag *jtag_info, uint32_t instr,
        if (in)
        {
                fields[0].in_value = (uint8_t *)in;
-               jtag_add_dr_scan(3, fields, jtag_get_end_state());
+               jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_DRPAUSE);
 
                jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)in);
        }
        else
        {
-               jtag_add_dr_scan(3, fields, jtag_get_end_state());
+               jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_DRPAUSE);
        }
 
-       jtag_add_runtest(0, jtag_get_end_state());
+       jtag_add_runtest(0, TAP_DRPAUSE);
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
        {
@@ -218,34 +214,32 @@ int arm9tdmi_clock_data_in(struct arm_jtag *jtag_info, uint32_t *in)
        int retval = ERROR_OK;;
        struct scan_field fields[3];
 
-       jtag_set_end_state(TAP_DRPAUSE);
-       if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+       if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
        {
                return retval;
        }
 
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
+       retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+       if (retval != ERROR_OK)
+               return retval;
 
-       fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = NULL;
        fields[0].in_value = (uint8_t *)in;
 
-       fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 3;
        fields[1].out_value = NULL;
        fields[1].in_value = NULL;
 
-       fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 32;
        fields[2].out_value = NULL;
        fields[2].in_value = NULL;
 
-       jtag_add_dr_scan(3, fields, jtag_get_end_state());
+       jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_DRPAUSE);
 
        jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)in);
 
-       jtag_add_runtest(0, jtag_get_end_state());
+       jtag_add_runtest(0, TAP_DRPAUSE);
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
        {
@@ -268,8 +262,6 @@ int arm9tdmi_clock_data_in(struct arm_jtag *jtag_info, uint32_t *in)
        return ERROR_OK;
 }
 
-extern void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip);
-
 static int arm9endianness(jtag_callback_data_t arg,
        jtag_callback_data_t size, jtag_callback_data_t be,
        jtag_callback_data_t captured)
@@ -290,34 +282,32 @@ int arm9tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
        int retval = ERROR_OK;
        struct scan_field fields[3];
 
-       jtag_set_end_state(TAP_DRPAUSE);
-       if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+       if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
        {
                return retval;
        }
 
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
+       retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+       if (retval != ERROR_OK)
+               return retval;
 
-       fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = NULL;
        jtag_alloc_in_value32(&fields[0]);
 
-       fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 3;
        fields[1].out_value = NULL;
        fields[1].in_value = NULL;
 
-       fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 32;
        fields[2].out_value = NULL;
        fields[2].in_value = NULL;
 
-       jtag_add_dr_scan(3, fields, jtag_get_end_state());
+       jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_DRPAUSE);
 
        jtag_add_callback4(arm9endianness, (jtag_callback_data_t)in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
 
-       jtag_add_runtest(0, jtag_get_end_state());
+       jtag_add_runtest(0, TAP_DRPAUSE);
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
        {
@@ -678,7 +668,8 @@ static void arm9tdmi_branch_resume_thumb(struct target *target)
        /* fetch NOP, LDM in EXECUTE stage (1st cycle) */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
        /* nothing fetched, LDM in EXECUTE stage (2nd cycle) */
-       arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) | 1, NULL, 0);
+       arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP,
+                       buf_get_u32(armv4_5->pc->value, 0, 32) | 1, NULL, 0);
        /* nothing fetched, LDM in EXECUTE stage (3rd cycle) */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 
@@ -753,7 +744,7 @@ static void arm9tdmi_build_reg_cache(struct target *target)
        struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
        struct arm *armv4_5 = target_to_arm(target);
 
-       (*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
+       (*cache_p) = arm_build_reg_cache(target, armv4_5);
 }
 
 int arm9tdmi_init_target(struct command_context *cmd_ctx,
@@ -799,7 +790,6 @@ int arm9tdmi_init_arch_info(struct target *target,
        arm7_9->post_debug_entry = NULL;
 
        arm7_9->pre_restore_context = NULL;
-       arm7_9->post_restore_context = NULL;
 
        /* initialize arch-specific breakpoint handling */
        arm7_9->arm_bkpt = 0xdeeedeee;
@@ -835,6 +825,12 @@ COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command)
        struct reg *vector_catch;
        uint32_t vector_catch_value;
 
+       if (!target_was_examined(target))
+       {
+               LOG_ERROR("Target not examined yet");
+               return ERROR_FAIL;
+       }
+
        /* it's uncommon, but some ARM7 chips can support this */
        if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC
                        || !arm7_9->has_vector_catch) {
@@ -913,7 +909,9 @@ static const struct command_registration arm9tdmi_exec_command_handlers[] = {
                .name = "vector_catch",
                .handler = handle_arm9tdmi_catch_vectors_command,
                .mode = COMMAND_EXEC,
-               .usage = "[all|none|reset|undef|swi|pabt|dabt|irq|fiq] ...",
+               .help = "Display, after optionally updating, configuration "
+                       "of vector catch unit.",
+               .usage = "[all|none|(reset|undef|swi|pabt|dabt|irq|fiq)*]",
        },
        COMMAND_REGISTRATION_DONE
 };
@@ -922,9 +920,9 @@ const struct command_registration arm9tdmi_command_handlers[] = {
                .chain = arm7_9_command_handlers,
        },
        {
-               .name = "arm9tdmi",
+               .name = "arm9",
                .mode = COMMAND_ANY,
-               .help = "arm9tdmi command group",
+               .help = "arm9 command group",
                .chain = arm9tdmi_exec_command_handlers,
        },
        COMMAND_REGISTRATION_DONE
@@ -936,7 +934,7 @@ struct target_type arm9tdmi_target =
        .name = "arm9tdmi",
 
        .poll = arm7_9_poll,
-       .arch_state = armv4_5_arch_state,
+       .arch_state = arm_arch_state,
 
        .target_request_data = arm7_9_target_request_data,
 
@@ -948,7 +946,7 @@ struct target_type arm9tdmi_target =
        .deassert_reset = arm7_9_deassert_reset,
        .soft_reset_halt = arm7_9_soft_reset_halt,
 
-       .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+       .get_gdb_reg_list = arm_get_gdb_reg_list,
 
        .read_memory = arm7_9_read_memory,
        .write_memory = arm7_9_write_memory,
@@ -968,4 +966,5 @@ struct target_type arm9tdmi_target =
        .target_create = arm9tdmi_target_create,
        .init_target = arm9tdmi_init_target,
        .examine = arm7_9_examine,
+       .check_reset = arm7_9_check_reset,
 };
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)