[0xF] = "CoreLink, PrimeCell or System component",
};
+static const struct {
+ enum ap_type type;
+ const char *description;
+} ap_types[] = {
+ { AP_TYPE_JTAG_AP, "JTAG-AP" },
+ { AP_TYPE_COM_AP, "COM-AP" },
+ { AP_TYPE_AHB3_AP, "MEM-AP AHB3" },
+ { AP_TYPE_APB_AP, "MEM-AP APB2 or APB3" },
+ { AP_TYPE_AXI_AP, "MEM-AP AXI3 or AXI4" },
+ { AP_TYPE_AHB5_AP, "MEM-AP AHB5" },
+ { AP_TYPE_APB4_AP, "MEM-AP APB4" },
+ { AP_TYPE_AXI5_AP, "MEM-AP AXI5" },
+ { AP_TYPE_AHB5H_AP, "MEM-AP AHB5 with enhanced HPROT" },
+};
+
+static const char *ap_type_to_description(enum ap_type type)
+{
+ for (unsigned int i = 0; i < ARRAY_SIZE(ap_types); i++)
+ if (type == ap_types[i].type)
+ return ap_types[i].description;
+
+ return "Unknown";
+}
+
/*
* This function checks the ID for each access port to find the requested Access Port type
*/
retval = dap_run(dap);
- /* IDR bits:
- * 31-28 : Revision
- * 27-24 : JEDEC bank (0x4 for ARM)
- * 23-17 : JEDEC code (0x3B for ARM)
- * 16-13 : Class (0b1000=Mem-AP)
- * 12-8 : Reserved
- * 7-4 : AP Variant (non-zero for JTAG-AP)
- * 3-0 : AP Type (0=JTAG-AP 1=AHB-AP 2=APB-AP 4=AXI-AP)
- */
-
/* Reading register for a non-existent AP should not cause an error,
* but just to be sure, try to continue searching if an error does happen.
*/
- if ((retval == ERROR_OK) && /* Register read success */
- ((id_val & IDR_JEP106) == IDR_JEP106_ARM) && /* Jedec codes match */
- ((id_val & IDR_TYPE) == type_to_find)) { /* type matches*/
-
+ if (retval == ERROR_OK && (id_val & AP_TYPE_MASK) == type_to_find) {
LOG_DEBUG("Found %s at AP index: %d (IDR=0x%08" PRIX32 ")",
- (type_to_find == AP_TYPE_AHB3_AP) ? "AHB3-AP" :
- (type_to_find == AP_TYPE_AHB5_AP) ? "AHB5-AP" :
- (type_to_find == AP_TYPE_APB_AP) ? "APB-AP" :
- (type_to_find == AP_TYPE_AXI_AP) ? "AXI-AP" :
- (type_to_find == AP_TYPE_JTAG_AP) ? "JTAG-AP" : "Unknown",
+ ap_type_to_description(type_to_find),
ap_num, id_val);
*ap_out = &dap->ap[ap_num];
}
}
- LOG_DEBUG("No %s found",
- (type_to_find == AP_TYPE_AHB3_AP) ? "AHB3-AP" :
- (type_to_find == AP_TYPE_AHB5_AP) ? "AHB5-AP" :
- (type_to_find == AP_TYPE_APB_AP) ? "APB-AP" :
- (type_to_find == AP_TYPE_AXI_AP) ? "AXI-AP" :
- (type_to_find == AP_TYPE_JTAG_AP) ? "JTAG-AP" : "Unknown");
+ LOG_DEBUG("No %s found", ap_type_to_description(type_to_find));
return ERROR_FAIL;
}
#define ANY_ID 0x1000
-#define ARM_ID 0x23B
-
-static const struct {
+static const struct dap_part_nums {
uint16_t designer_id;
uint16_t part_num;
const char *type;
const char *full;
-} dap_partnums[] = {
+} dap_part_nums[] = {
{ ARM_ID, 0x000, "Cortex-M3 SCS", "(System Control Space)", },
{ ARM_ID, 0x001, "Cortex-M3 ITM", "(Instrumentation Trace Module)", },
{ ARM_ID, 0x002, "Cortex-M3 DWT", "(Data Watchpoint and Trace)", },
{ ANY_ID, 0x343, "TI DAPCTL", "", }, /* from OMAP3 memmap */
};
+static const struct dap_part_nums *pidr_to_part_num(unsigned int designer_id, unsigned int part_num)
+{
+ static const struct dap_part_nums unknown = {
+ .type = "Unrecognized",
+ .full = "",
+ };
+
+ for (unsigned int i = 0; i < ARRAY_SIZE(dap_part_nums); i++) {
+ if (dap_part_nums[i].designer_id != designer_id && dap_part_nums[i].designer_id != ANY_ID)
+ continue;
+ if (dap_part_nums[i].part_num == part_num)
+ return &dap_part_nums[i];
+ }
+ return &unknown;
+}
+
+static int dap_devtype_display(struct command_invocation *cmd, uint32_t devtype)
+{
+ const char *major = "Reserved", *subtype = "Reserved";
+ const unsigned int minor = (devtype & ARM_CS_C9_DEVTYPE_SUB_MASK) >> ARM_CS_C9_DEVTYPE_SUB_SHIFT;
+ const unsigned int devtype_major = (devtype & ARM_CS_C9_DEVTYPE_MAJOR_MASK) >> ARM_CS_C9_DEVTYPE_MAJOR_SHIFT;
+ switch (devtype_major) {
+ case 0:
+ major = "Miscellaneous";
+ switch (minor) {
+ case 0:
+ subtype = "other";
+ break;
+ case 4:
+ subtype = "Validation component";
+ break;
+ }
+ break;
+ case 1:
+ major = "Trace Sink";
+ switch (minor) {
+ case 0:
+ subtype = "other";
+ break;
+ case 1:
+ subtype = "Port";
+ break;
+ case 2:
+ subtype = "Buffer";
+ break;
+ case 3:
+ subtype = "Router";
+ break;
+ }
+ break;
+ case 2:
+ major = "Trace Link";
+ switch (minor) {
+ case 0:
+ subtype = "other";
+ break;
+ case 1:
+ subtype = "Funnel, router";
+ break;
+ case 2:
+ subtype = "Filter";
+ break;
+ case 3:
+ subtype = "FIFO, buffer";
+ break;
+ }
+ break;
+ case 3:
+ major = "Trace Source";
+ switch (minor) {
+ case 0:
+ subtype = "other";
+ break;
+ case 1:
+ subtype = "Processor";
+ break;
+ case 2:
+ subtype = "DSP";
+ break;
+ case 3:
+ subtype = "Engine/Coprocessor";
+ break;
+ case 4:
+ subtype = "Bus";
+ break;
+ case 6:
+ subtype = "Software";
+ break;
+ }
+ break;
+ case 4:
+ major = "Debug Control";
+ switch (minor) {
+ case 0:
+ subtype = "other";
+ break;
+ case 1:
+ subtype = "Trigger Matrix";
+ break;
+ case 2:
+ subtype = "Debug Auth";
+ break;
+ case 3:
+ subtype = "Power Requestor";
+ break;
+ }
+ break;
+ case 5:
+ major = "Debug Logic";
+ switch (minor) {
+ case 0:
+ subtype = "other";
+ break;
+ case 1:
+ subtype = "Processor";
+ break;
+ case 2:
+ subtype = "DSP";
+ break;
+ case 3:
+ subtype = "Engine/Coprocessor";
+ break;
+ case 4:
+ subtype = "Bus";
+ break;
+ case 5:
+ subtype = "Memory";
+ break;
+ }
+ break;
+ case 6:
+ major = "Performance Monitor";
+ switch (minor) {
+ case 0:
+ subtype = "other";
+ break;
+ case 1:
+ subtype = "Processor";
+ break;
+ case 2:
+ subtype = "DSP";
+ break;
+ case 3:
+ subtype = "Engine/Coprocessor";
+ break;
+ case 4:
+ subtype = "Bus";
+ break;
+ case 5:
+ subtype = "Memory";
+ break;
+ }
+ break;
+ }
+ command_print(cmd, "\t\tType is 0x%02x, %s, %s",
+ devtype & ARM_CS_C9_DEVTYPE_MASK,
+ major, subtype);
+ return ERROR_OK;
+}
+
static int dap_rom_display(struct command_invocation *cmd,
struct adiv5_ap *ap, target_addr_t dbgbase, int depth)
{
command_print(cmd, "\t\tPeripheral ID 0x%010" PRIx64, pid);
- uint8_t class = (cid & ARM_CS_CIDR_CLASS_MASK) >> ARM_CS_CIDR_CLASS_SHIFT;
- uint16_t part_num = ARM_CS_PIDR_PART(pid);
- uint16_t designer_id = ARM_CS_PIDR_DESIGNER(pid);
+ const unsigned int class = (cid & ARM_CS_CIDR_CLASS_MASK) >> ARM_CS_CIDR_CLASS_SHIFT;
+ const unsigned int part_num = ARM_CS_PIDR_PART(pid);
+ unsigned int designer_id = ARM_CS_PIDR_DESIGNER(pid);
if (pid & ARM_CS_PIDR_JEDEC) {
/* JEP106 code */
- command_print(cmd, "\t\tDesigner is 0x%03" PRIx16 ", %s",
+ command_print(cmd, "\t\tDesigner is 0x%03x, %s",
designer_id, jep106_manufacturer(designer_id));
} else {
/* Legacy ASCII ID, clear invalid bits */
designer_id &= 0x7f;
- command_print(cmd, "\t\tDesigner ASCII code 0x%02" PRIx16 ", %s",
+ command_print(cmd, "\t\tDesigner ASCII code 0x%02x, %s",
designer_id, designer_id == 0x41 ? "ARM" : "<unknown>");
}
- /* default values to be overwritten upon finding a match */
- const char *type = "Unrecognized";
- const char *full = "";
-
- /* search dap_partnums[] array for a match */
- for (unsigned entry = 0; entry < ARRAY_SIZE(dap_partnums); entry++) {
-
- if ((dap_partnums[entry].designer_id != designer_id) && (dap_partnums[entry].designer_id != ANY_ID))
- continue;
-
- if (dap_partnums[entry].part_num != part_num)
- continue;
-
- type = dap_partnums[entry].type;
- full = dap_partnums[entry].full;
- break;
- }
-
- command_print(cmd, "\t\tPart is 0x%" PRIx16", %s %s", part_num, type, full);
- command_print(cmd, "\t\tComponent class is 0x%" PRIx8 ", %s", class, class_description[class]);
+ const struct dap_part_nums *partnum = pidr_to_part_num(designer_id, part_num);
+ command_print(cmd, "\t\tPart is 0x%03x, %s %s", part_num, partnum->type, partnum->full);
+ command_print(cmd, "\t\tComponent class is 0x%x, %s", class, class_description[class]);
if (class == ARM_CS_CLASS_0X1_ROM_TABLE) {
uint32_t memtype;
}
}
} else if (class == ARM_CS_CLASS_0X9_CS_COMPONENT) {
- const char *major = "Reserved", *subtype = "Reserved";
-
uint32_t devtype;
retval = mem_ap_read_atomic_u32(ap, base_addr + ARM_CS_C9_DEVTYPE, &devtype);
if (retval != ERROR_OK)
return retval;
- unsigned int minor = (devtype & ARM_CS_C9_DEVTYPE_SUB_MASK) >> ARM_CS_C9_DEVTYPE_SUB_SHIFT;
- unsigned int devtype_major = (devtype & ARM_CS_C9_DEVTYPE_MAJOR_MASK) >> ARM_CS_C9_DEVTYPE_MAJOR_SHIFT;
- switch (devtype_major) {
- case 0:
- major = "Miscellaneous";
- switch (minor) {
- case 0:
- subtype = "other";
- break;
- case 4:
- subtype = "Validation component";
- break;
- }
- break;
- case 1:
- major = "Trace Sink";
- switch (minor) {
- case 0:
- subtype = "other";
- break;
- case 1:
- subtype = "Port";
- break;
- case 2:
- subtype = "Buffer";
- break;
- case 3:
- subtype = "Router";
- break;
- }
- break;
- case 2:
- major = "Trace Link";
- switch (minor) {
- case 0:
- subtype = "other";
- break;
- case 1:
- subtype = "Funnel, router";
- break;
- case 2:
- subtype = "Filter";
- break;
- case 3:
- subtype = "FIFO, buffer";
- break;
- }
- break;
- case 3:
- major = "Trace Source";
- switch (minor) {
- case 0:
- subtype = "other";
- break;
- case 1:
- subtype = "Processor";
- break;
- case 2:
- subtype = "DSP";
- break;
- case 3:
- subtype = "Engine/Coprocessor";
- break;
- case 4:
- subtype = "Bus";
- break;
- case 6:
- subtype = "Software";
- break;
- }
- break;
- case 4:
- major = "Debug Control";
- switch (minor) {
- case 0:
- subtype = "other";
- break;
- case 1:
- subtype = "Trigger Matrix";
- break;
- case 2:
- subtype = "Debug Auth";
- break;
- case 3:
- subtype = "Power Requestor";
- break;
- }
- break;
- case 5:
- major = "Debug Logic";
- switch (minor) {
- case 0:
- subtype = "other";
- break;
- case 1:
- subtype = "Processor";
- break;
- case 2:
- subtype = "DSP";
- break;
- case 3:
- subtype = "Engine/Coprocessor";
- break;
- case 4:
- subtype = "Bus";
- break;
- case 5:
- subtype = "Memory";
- break;
- }
- break;
- case 6:
- major = "Performance Monitor";
- switch (minor) {
- case 0:
- subtype = "other";
- break;
- case 1:
- subtype = "Processor";
- break;
- case 2:
- subtype = "DSP";
- break;
- case 3:
- subtype = "Engine/Coprocessor";
- break;
- case 4:
- subtype = "Bus";
- break;
- case 5:
- subtype = "Memory";
- break;
- }
- break;
- }
- command_print(cmd, "\t\tType is 0x%02x, %s, %s",
- devtype & ARM_CS_C9_DEVTYPE_MASK,
- major, subtype);
+
+ retval = dap_devtype_display(cmd, devtype);
+ if (retval != ERROR_OK)
+ return retval;
+
/* REVISIT also show ARM_CS_C9_DEVID */
}
uint32_t apid;
target_addr_t dbgbase;
target_addr_t dbgaddr;
- uint8_t mem_ap;
/* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */
retval = dap_get_debugbase(ap, &dbgbase, &apid);
return ERROR_FAIL;
}
- switch (apid & (IDR_JEP106 | IDR_TYPE)) {
- case IDR_JEP106_ARM | AP_TYPE_JTAG_AP:
- command_print(cmd, "\tType is JTAG-AP");
- break;
- case IDR_JEP106_ARM | AP_TYPE_AHB3_AP:
- command_print(cmd, "\tType is MEM-AP AHB3");
- break;
- case IDR_JEP106_ARM | AP_TYPE_AHB5_AP:
- command_print(cmd, "\tType is MEM-AP AHB5");
- break;
- case IDR_JEP106_ARM | AP_TYPE_APB_AP:
- command_print(cmd, "\tType is MEM-AP APB");
- break;
- case IDR_JEP106_ARM | AP_TYPE_AXI_AP:
- command_print(cmd, "\tType is MEM-AP AXI");
- break;
- default:
- command_print(cmd, "\tUnknown AP type");
- break;
- }
+ command_print(cmd, "\tType is %s", ap_type_to_description(apid & AP_TYPE_MASK));
/* NOTE: a MEM-AP may have a single CoreSight component that's
* not a ROM table ... or have no such components at all.
*/
- mem_ap = (apid & IDR_CLASS) == AP_CLASS_MEM_AP;
- if (mem_ap) {
+ const unsigned int class = (apid & AP_REG_IDR_CLASS_MASK) >> AP_REG_IDR_CLASS_SHIFT;
+
+ if (class == AP_REG_IDR_CLASS_MEM_AP) {
if (is_64bit_ap(ap))
dbgaddr = 0xFFFFFFFFFFFFFFFFull;
else