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- Fixes '=' whitespace
[openocd.git] / src / target / arm_adi_v5.c
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 7d6ae81d939593ba61bc663e0d67c80dfcb3e963..57f6603b84cb7d5d230891f5e75906d49406cec0 100644 (file)
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -132,7 +132,7 @@ int adi_jtag_dp_scan_u32(swjdp_common_t *swjdp, uint8_t instr, uint8_t reg_addr,
                fields[1].in_value = (uint8_t *)invalue;
                jtag_add_dr_scan(2, fields, jtag_get_end_state());
 
-               jtag_add_callback(arm_le_to_h_u32, (uint8_t *)invalue);
+               jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t) invalue);
        } else
        {
 
@@ -152,7 +152,7 @@ int scan_inout_check(swjdp_common_t *swjdp, uint8_t instr, uint8_t reg_addr, uin
                adi_jtag_dp_scan(swjdp, DAP_IR_DPACC, DP_RDBUFF, DPAP_READ, 0, invalue, &swjdp->ack);
        }
 
-       /* In TRANS_MODE_ATOMIC all DAP_IR_APACC transactions wait for ack=OK/FAULT and the check CTRL_STAT */
+       /* In TRANS_MODE_ATOMIC all DAP_IR_APACC transactions wait for ack = OK/FAULT and the check CTRL_STAT */
        if ((instr == DAP_IR_APACC) && (swjdp->trans_mode == TRANS_MODE_ATOMIC))
        {
                return swjdp_transaction_endcheck(swjdp);
@@ -165,12 +165,12 @@ int scan_inout_check_u32(swjdp_common_t *swjdp, uint8_t instr, uint8_t reg_addr,
 {
        adi_jtag_dp_scan_u32(swjdp, instr, reg_addr, RnW, outvalue, NULL, NULL);
 
-       if ((RnW==DPAP_READ) && (invalue != NULL))
+       if ((RnW == DPAP_READ) && (invalue != NULL))
        {
                adi_jtag_dp_scan_u32(swjdp, DAP_IR_DPACC, DP_RDBUFF, DPAP_READ, 0, invalue, &swjdp->ack);
        }
 
-       /* In TRANS_MODE_ATOMIC all DAP_IR_APACC transactions wait for ack=OK/FAULT and then check CTRL_STAT */
+       /* In TRANS_MODE_ATOMIC all DAP_IR_APACC transactions wait for ack = OK/FAULT and then check CTRL_STAT */
        if ((instr == DAP_IR_APACC) && (swjdp->trans_mode == TRANS_MODE_ATOMIC))
        {
                return swjdp_transaction_endcheck(swjdp);
@@ -195,7 +195,7 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
 
        https://lists.berlios.de/pipermail/openocd-development/2008-September/003107.html
        */
-       if ((retval=jtag_execute_queue())!=ERROR_OK)
+       if ((retval = jtag_execute_queue()) != ERROR_OK)
        {
                LOG_ERROR("BUG: Why does this fail the first time????");
        }
@@ -203,14 +203,14 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
 #endif
 
        scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
-       if ((retval=jtag_execute_queue())!=ERROR_OK)
+       if ((retval = jtag_execute_queue()) != ERROR_OK)
                return retval;
 
        swjdp->ack = swjdp->ack & 0x7;
 
        if (swjdp->ack != 2)
        {
-               long long then=timeval_ms();
+               long long then = timeval_ms();
                while (swjdp->ack != 2)
                {
                        if (swjdp->ack == 1)
@@ -228,7 +228,7 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
                        }
 
                        scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
-                       if ((retval=jtag_execute_queue())!=ERROR_OK)
+                       if ((retval = jtag_execute_queue()) != ERROR_OK)
                                return retval;
                        swjdp->ack = swjdp->ack & 0x7;
                }
@@ -240,7 +240,7 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
        /* Check for STICKYERR and STICKYORUN */
        if (ctrlstat & (SSTICKYORUN | SSTICKYERR))
        {
-               LOG_DEBUG("swjdp: CTRL/STAT error 0x%x", ctrlstat);
+               LOG_DEBUG("swjdp: CTRL/STAT error 0x%" PRIx32 "", ctrlstat);
                /* Check power to debug regions */
                if ((ctrlstat & 0xf0000000) != 0xf0000000)
                {
@@ -251,7 +251,7 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
                        uint32_t mem_ap_csw, mem_ap_tar;
 
                        /* Print information about last AHBAP access */
-                       LOG_ERROR("AHBAP Cached values: dp_select 0x%x, ap_csw 0x%x, ap_tar 0x%x", swjdp->dp_select_value, swjdp->ap_csw_value, swjdp->ap_tar_value);
+                       LOG_ERROR("AHBAP Cached values: dp_select 0x%" PRIx32 ", ap_csw 0x%" PRIx32 ", ap_tar 0x%" PRIx32 "", swjdp->dp_select_value, swjdp->ap_csw_value, swjdp->ap_tar_value);
                        if (ctrlstat & SSTICKYORUN)
                                LOG_ERROR("SWJ-DP OVERRUN - check clock or reduce jtag speed");
 
@@ -261,19 +261,19 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
                        /* Clear Sticky Error Bits */
                        scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_WRITE, swjdp->dp_ctrl_stat | SSTICKYORUN | SSTICKYERR, NULL);
                        scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
-                       if ((retval=jtag_execute_queue())!=ERROR_OK)
+                       if ((retval = jtag_execute_queue()) != ERROR_OK)
                                return retval;
 
-                       LOG_DEBUG("swjdp: status 0x%x", ctrlstat);
+                       LOG_DEBUG("swjdp: status 0x%" PRIx32 "", ctrlstat);
 
                        dap_ap_read_reg_u32(swjdp, AP_REG_CSW, &mem_ap_csw);
                        dap_ap_read_reg_u32(swjdp, AP_REG_TAR, &mem_ap_tar);
-                       if ((retval=jtag_execute_queue())!=ERROR_OK)
+                       if ((retval = jtag_execute_queue()) != ERROR_OK)
                                return retval;
-                       LOG_ERROR("Read MEM_AP_CSW 0x%x, MEM_AP_TAR 0x%x", mem_ap_csw, mem_ap_tar);
+                       LOG_ERROR("Read MEM_AP_CSW 0x%" PRIx32 ", MEM_AP_TAR 0x%" PRIx32 "", mem_ap_csw, mem_ap_tar);
 
                }
-               if ((retval=jtag_execute_queue())!=ERROR_OK)
+               if ((retval = jtag_execute_queue()) != ERROR_OK)
                        return retval;
                return ERROR_JTAG_DEVICE_ERROR;
        }
@@ -300,7 +300,7 @@ int dap_dp_read_reg(swjdp_common_t *swjdp, uint32_t *value, uint8_t reg_addr)
 int dap_ap_select(swjdp_common_t *swjdp,uint8_t apsel)
 {
        uint32_t select;
-       select = (apsel<<24) & 0xFF000000;
+       select = (apsel << 24) & 0xFF000000;
 
        if (select != swjdp->apsel)
        {
@@ -508,7 +508,7 @@ int mem_ap_write_buf_u32(swjdp_common_t *swjdp, uint8_t *buffer, int count, uint
 
                if (errorcount > 1)
                {
-                       LOG_WARNING("Block write error address 0x%x, wcount 0x%x", address, wcount);
+                       LOG_WARNING("Block write error address 0x%" PRIx32 ", wcount 0x%x", address, wcount);
                        return ERROR_JTAG_DEVICE_ERROR;
                }
        }
@@ -550,7 +550,7 @@ int mem_ap_write_buf_packed_u16(swjdp_common_t *swjdp, uint8_t *buffer, int coun
                        {
                                if (mem_ap_write_buf_u16(swjdp, buffer, nbytes, address) != ERROR_OK)
                                {
-                                       LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count);
+                                       LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count);
                                        return ERROR_JTAG_DEVICE_ERROR;
                                }
 
@@ -572,7 +572,7 @@ int mem_ap_write_buf_packed_u16(swjdp_common_t *swjdp, uint8_t *buffer, int coun
                                dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue);
                                if (swjdp_transaction_endcheck(swjdp) != ERROR_OK)
                                {
-                                       LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count);
+                                       LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count);
                                        return ERROR_JTAG_DEVICE_ERROR;
                                }
                        }
@@ -642,7 +642,7 @@ int mem_ap_write_buf_packed_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count
                        {
                                if (mem_ap_write_buf_u8(swjdp, buffer, nbytes, address) != ERROR_OK)
                                {
-                                       LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count);
+                                       LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count);
                                        return ERROR_JTAG_DEVICE_ERROR;
                                }
 
@@ -664,7 +664,7 @@ int mem_ap_write_buf_packed_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count
                                dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue);
                                if (swjdp_transaction_endcheck(swjdp) != ERROR_OK)
                                {
-                                       LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count);
+                                       LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count);
                                        return ERROR_JTAG_DEVICE_ERROR;
                                }
                        }
@@ -756,7 +756,7 @@ int mem_ap_read_buf_u32(swjdp_common_t *swjdp, uint8_t *buffer, int count, uint3
 
                if (errorcount > 1)
                {
-                       LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count);
+                       LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count);
                        return ERROR_JTAG_DEVICE_ERROR;
                }
        }
@@ -813,7 +813,7 @@ int mem_ap_read_buf_packed_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count
                        dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue );
                        if (swjdp_transaction_endcheck(swjdp) != ERROR_OK)
                        {
-                               LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count);
+                               LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count);
                                return ERROR_JTAG_DEVICE_ERROR;
                        }
 
@@ -905,7 +905,7 @@ int mem_ap_read_buf_packed_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count,
                        dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue );
                        if (swjdp_transaction_endcheck(swjdp) != ERROR_OK)
                        {
-                               LOG_WARNING("Block read error address 0x%x, count 0x%x", address, count);
+                               LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count);
                                return ERROR_JTAG_DEVICE_ERROR;
                        }
 
@@ -971,7 +971,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp)
 
        dap_dp_write_reg(swjdp, swjdp->dp_ctrl_stat, DP_CTRL_STAT);
        dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
-       if ((retval=jtag_execute_queue())!=ERROR_OK)
+       if ((retval = jtag_execute_queue()) != ERROR_OK)
                return retval;
 
        /* Check that we have debug power domains activated */
@@ -979,7 +979,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp)
        {
                LOG_DEBUG("swjdp: wait CDBGPWRUPACK");
                dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
-               if ((retval=jtag_execute_queue())!=ERROR_OK)
+               if ((retval = jtag_execute_queue()) != ERROR_OK)
                        return retval;
                alive_sleep(10);
        }
@@ -988,7 +988,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp)
        {
                LOG_DEBUG("swjdp: wait CSYSPWRUPACK");
                dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
-               if ((retval=jtag_execute_queue())!=ERROR_OK)
+               if ((retval = jtag_execute_queue()) != ERROR_OK)
                        return retval;
                alive_sleep(10);
        }
@@ -1002,7 +1002,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp)
        dap_ap_read_reg_u32(swjdp, 0xFC, &idreg);
        dap_ap_read_reg_u32(swjdp, 0xF8, &romaddr);
 
-       LOG_DEBUG("AHB-AP ID Register 0x%x, Debug ROM Address 0x%x", idreg, romaddr);
+       LOG_DEBUG("AHB-AP ID Register 0x%" PRIx32 ", Debug ROM Address 0x%" PRIx32 "", idreg, romaddr);
 
        return ERROR_OK;
 }
@@ -1027,8 +1027,8 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
        dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
        swjdp_transaction_endcheck(swjdp);
        /* Now we read ROM table ID registers, ref. ARM IHI 0029B sec  */
-       mem_ap = ((apid&0x10000)&&((apid&0x0F)!=0));
-       command_print(cmd_ctx, "ap identification register 0x%8.8x", apid);
+       mem_ap = ((apid&0x10000) && ((apid&0x0F) != 0));
+       command_print(cmd_ctx, "ap identification register 0x%8.8" PRIx32 "", apid);
        if (apid)
        {
                switch (apid&0x0F)
@@ -1046,14 +1046,14 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
                                command_print(cmd_ctx, "\tUnknown AP-type");
                        break;
                }
-               command_print(cmd_ctx, "ap debugbase 0x%8.8x", dbgbase);
+               command_print(cmd_ctx, "ap debugbase 0x%8.8" PRIx32 "", dbgbase);
        }
        else
        {
                command_print(cmd_ctx, "No AP found at this apsel 0x%x", apsel);
        }
 
-       romtable_present = ((mem_ap)&&(dbgbase != 0xFFFFFFFF));
+       romtable_present = ((mem_ap) && (dbgbase != 0xFFFFFFFF));
        if (romtable_present)
        {
                uint32_t cid0,cid1,cid2,cid3,memtype,romentry;
@@ -1074,7 +1074,7 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
                mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000)|0xFFC, &cid3);
                mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000)|0xFCC, &memtype);
                swjdp_transaction_endcheck(swjdp);
-               command_print(cmd_ctx, "\tCID3 0x%x, CID2 0x%x, CID1 0x%x, CID0, 0x%x",cid3,cid2,cid1,cid0);
+               command_print(cmd_ctx, "\tCID3 0x%" PRIx32 ", CID2 0x%" PRIx32 ", CID1 0x%" PRIx32 " CID0, 0x%" PRIx32,cid3,cid2,cid1,cid0);
                if (memtype&0x01)
                {
                        command_print(cmd_ctx, "\tMEMTYPE system memory present on bus");
@@ -1089,7 +1089,7 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
                do
                {
                        mem_ap_read_atomic_u32(swjdp, (dbgbase&0xFFFFF000)|entry_offset, &romentry);
-                       command_print(cmd_ctx, "\tROMTABLE[0x%x] = 0x%x",entry_offset,romentry);
+                       command_print(cmd_ctx, "\tROMTABLE[0x%x] = 0x%" PRIx32 "",entry_offset,romentry);
                        if (romentry&0x01)
                        {
                                uint32_t c_cid0,c_cid1,c_cid2,c_cid3,c_pid0,c_pid1,c_pid2,c_pid3,c_pid4,component_start;
@@ -1103,12 +1103,12 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
                                mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFF4, &c_cid1);
                                mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFF8, &c_cid2);
                                mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFFC, &c_cid3);
-                               component_start = component_base - 0x1000*(c_pid4>>4);
-                               command_print(cmd_ctx, "\t\tComponent base address 0x%x, pid4 0x%x, start address 0x%x",component_base,c_pid4,component_start);
-                               command_print(cmd_ctx, "\t\tComponent cid1 0x%x, class is %s",c_cid1,class_description[(c_cid1>>4)&0xF]); /* Se ARM DDI 0314 C Table 2.2 */
-                               command_print(cmd_ctx, "\t\tCID3 0x%x, CID2 0x%x, CID1 0x%x, CID0, 0x%x",c_cid3,c_cid2,c_cid1,c_cid0);
-                               command_print(cmd_ctx, "\t\tPID3 0x%x, PID2 0x%x, PID1 0x%x, PID0, 0x%x",c_pid3,c_pid2,c_pid1,c_pid0);
-                               /* For CoreSight components,  (c_cid1>>4)&0xF==9 , we also read 0xFC8 DevId and 0xFCC DevType */
+                               component_start = component_base - 0x1000*(c_pid4 >> 4);
+                               command_print(cmd_ctx, "\t\tComponent base address 0x%" PRIx32 ", pid4 0x%" PRIx32 ", start address 0x%" PRIx32 "",component_base,c_pid4,component_start);
+                               command_print(cmd_ctx, "\t\tComponent cid1 0x%" PRIx32 ", class is %s",c_cid1,class_description[(c_cid1 >> 4)&0xF]); /* Se ARM DDI 0314 C Table 2.2 */
+                               command_print(cmd_ctx, "\t\tCID3 0x%" PRIx32 ", CID2 0x%" PRIx32 ", CID1 0x%" PRIx32 ", CID0, 0x%" PRIx32 "",c_cid3,c_cid2,c_cid1,c_cid0);
+                               command_print(cmd_ctx, "\t\tPID3 0x%" PRIx32 ", PID2 0x%" PRIx32 ", PID1 0x%" PRIx32 ", PID0, 0x%" PRIx32 "",c_pid3,c_pid2,c_pid1,c_pid0);
+                               /* For CoreSight components,  (c_cid1 >> 4)&0xF == 9 , we also read 0xFC8 DevId and 0xFCC DevType */
                        }
                        else
                        {
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1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)