#define AP_REG_IDR 0xFC /* RO: Identification Register */
/* Fields of the MEM-AP's CSW register */
+#define CSW_SIZE_MASK 7
#define CSW_8BIT 0
#define CSW_16BIT 1
#define CSW_32BIT 2
#define CSW_ADDRINC_PACKED (2UL << 4)
#define CSW_DEVICE_EN (1UL << 6)
#define CSW_TRIN_PROG (1UL << 7)
+/* all fields in bits 12 and above are implementation-defined! */
#define CSW_SPIDEN (1UL << 23)
-/* 30:24 - implementation-defined! */
-#define CSW_HPROT (1UL << 25) /* ? */
-#define CSW_MASTER_DEBUG (1UL << 29) /* ? */
+#define CSW_HPROT1 (1UL << 25) /* AHB: Privileged */
+#define CSW_MASTER_DEBUG (1UL << 29) /* AHB: set HMASTER signals to AHB-AP ID */
#define CSW_SPROT (1UL << 30)
#define CSW_DBGSWENABLE (1UL << 31)
+/* initial value of csw_default used for MEM-AP transfers */
+#define CSW_DEFAULT (CSW_HPROT1 | CSW_MASTER_DEBUG | CSW_DBGSWENABLE)
+
/* Fields of the MEM-AP's IDR register */
#define IDR_REV (0xFUL << 28)
#define IDR_JEP106 (0x7FFUL << 17)
/* true if unaligned memory access is not supported by the MEM-AP */
bool unaligned_access_bad;
+
+ /* true if tar_value is in sync with TAR register */
+ bool tar_valid;
};
* should be performed before the next access.
*/
bool do_reconnect;
+
+ /** Flag saying whether to ignore the syspwrupack flag in DAP. Some devices
+ * do not set this bit until later in the bringup sequence */
+ bool ignore_syspwrupack;
};
/**
* available until run().
*/
struct dap_ops {
+ /** connect operation for SWD */
+ int (*connect)(struct adiv5_dap *dap);
/** DP register read. */
int (*queue_dp_read)(struct adiv5_dap *dap, unsigned reg,
uint32_t *data);
int mem_ap_write_buf_noincr(struct adiv5_ap *ap,
const uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address);
-/* Create DAP struct */
-struct adiv5_dap *dap_init(void);
-
/* Initialisation of the debug system, power domains and registers */
int dap_dp_init(struct adiv5_dap *dap);
int mem_ap_init(struct adiv5_ap *ap);
+/* Invalidate cached DP select and cached TAR and CSW of all APs */
+void dap_invalidate_cache(struct adiv5_dap *dap);
+
/* Probe the AP for ROM Table location */
int dap_get_debugbase(struct adiv5_ap *ap,
uint32_t *dbgbase, uint32_t *apid);
/* Put debug link into JTAG mode */
int dap_to_jtag(struct target *target);
-extern const struct command_registration dap_command_handlers[];
+extern const struct command_registration dap_instance_commands[];
+
+struct arm_dap_object;
+extern struct adiv5_dap *dap_instance_by_jim_obj(Jim_Interp *interp, Jim_Obj *o);
+extern struct adiv5_dap *adiv5_get_dap(struct arm_dap_object *obj);
+extern int dap_info_command(struct command_context *cmd_ctx,
+ struct adiv5_ap *ap);
+extern int dap_register_commands(struct command_context *cmd_ctx);
+extern const char *adiv5_dap_name(struct adiv5_dap *self);
+extern const struct swd_driver *adiv5_dap_swd_driver(struct adiv5_dap *self);
+extern int dap_cleanup_all(void);
struct adiv5_private_config {
int ap_num;
+ struct adiv5_dap *dap;
};
+extern int adiv5_verify_config(struct adiv5_private_config *pc);
extern int adiv5_jim_configure(struct target *target, Jim_GetOptInfo *goi);
#endif /* OPENOCD_TARGET_ARM_ADI_V5_H */