arm_adi_v5: Add convenience "atomic"" function for DP reads

[openocd.git] / src / target / arm_adi_v5.h

diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index cdcf928a025d1370465fed2de694ba56073e4392..9f0dea9119186466e38f2f389c0f6f89290ba71e 100644 (file)
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -189,6 +189,15 @@ struct adiv5_dap {
 
        /* true if packed transfers are supported by the MEM-AP */
        bool packed_transfers;
+
+       /* true if unaligned memory access is not supported by the MEM-AP */
+       bool unaligned_access_bad;
+
+       /* The TI TMS470 and TMS570 series processors use a BE-32 memory ordering
+        * despite lack of support in the ARMv7 architecture. Memory access through
+        * the AHB-AP has strange byte ordering these processors, and we need to
+        * swizzle appropriately. */
+       bool ti_be_32_quirks;
 };
 
 /**
@@ -380,6 +389,18 @@ static inline int dap_run(struct adiv5_dap *dap)
        return dap->ops->run(dap);
 }
 
+static inline int dap_dp_read_atomic(struct adiv5_dap *dap, unsigned reg,
+                                    uint32_t *value)
+{
+       int retval;
+
+       retval = dap_queue_dp_read(dap, reg, value);
+       if (retval != ERROR_OK)
+               return retval;
+
+       return dap_run(dap);
+}
+
 /** Accessor for currently selected DAP-AP number (0..255) */
 static inline uint8_t dap_ap_get_select(struct adiv5_dap *swjdp)
 {