ARMv7-M: make DAP commands verify target is an ARMv7-M

[openocd.git] / src / target / arm_disassembler.h

diff --git a/src/target/arm_disassembler.h b/src/target/arm_disassembler.h
index c69ab65920625f4fb3c17b75a0037ec49245a589..156c037e1eda42bc77ffe51b69e02535e2971580 100644 (file)
--- a/src/target/arm_disassembler.h
+++ b/src/target/arm_disassembler.h
@@ -20,7 +20,7 @@
 #ifndef ARM_DISASSEMBLER_H
 #define ARM_DISASSEMBLER_H
 
-#include "types.h"
+#include <helper/types.h>
 
 enum arm_instruction_type
 {
@@ -170,16 +170,16 @@ struct arm_load_store_instr
        } offset;
 };
 
-typedef struct arm_load_store_multiple_instr_s
+struct arm_load_store_multiple_instr
 {
        uint8_t Rn;
        uint32_t register_list;
        uint8_t addressing_mode; /* 0: IA, 1: IB, 2: DA, 3: DB */
        uint8_t S;
        uint8_t W;
-} arm_load_store_multiple_instr_t;
+};
 
-typedef struct arm_instruction_s
+struct arm_instruction
 {
        enum arm_instruction_type type;
        char text[128];
@@ -192,18 +192,18 @@ typedef struct arm_instruction_s
                struct arm_b_bl_bx_blx_instr b_bl_bx_blx;
                struct arm_data_proc_instr data_proc;
                struct arm_load_store_instr load_store;
-               arm_load_store_multiple_instr_t load_store_multiple;
+               struct arm_load_store_multiple_instr load_store_multiple;
        } info;
 
-} arm_instruction_t;
+};
 
 int arm_evaluate_opcode(uint32_t opcode, uint32_t address,
-               arm_instruction_t *instruction);
+               struct arm_instruction *instruction);
 int thumb_evaluate_opcode(uint16_t opcode, uint32_t address,
-               arm_instruction_t *instruction);
-int thumb2_opcode(target_t *target, uint32_t address,
-               arm_instruction_t *instruction);
-int arm_access_size(arm_instruction_t *instruction);
+               struct arm_instruction *instruction);
+int thumb2_opcode(struct target *target, uint32_t address,
+               struct arm_instruction *instruction);
+int arm_access_size(struct arm_instruction *instruction);
 
 #define COND(opcode) (arm_condition_strings[(opcode & 0xf0000000) >> 28])