armv7m: Fix memory leak in register caching.

[openocd.git] / src / target / arm_simulator.c

diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c
index 215739d67222072d93e121ac76f77b2d7a3fd2c5..26f5b8e160191bdb1a2c18ae82031f9761afb991 100644 (file)
--- a/src/target/arm_simulator.c
+++ b/src/target/arm_simulator.c
@@ -18,7 +18,7 @@
  *   You should have received a copy of the GNU General Public License     *
  *   along with this program; if not, write to the                         *
  *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -524,7 +524,7 @@ static int arm_simulate_step_core(struct target *target,
 
                switch (instruction.info.load_store_multiple.addressing_mode) {
                        case 0: /* Increment after */
-                               Rn = Rn;
+                               /* Rn = Rn; */
                                break;
                        case 1: /* Increment before */
                                Rn = Rn + 4;
@@ -604,7 +604,7 @@ static int arm_simulate_step_core(struct target *target,
 
                        switch (instruction.info.load_store_multiple.addressing_mode) {
                                case 0: /* Increment after */
-                                       Rn = Rn;
+                                       /* Rn = Rn; */
                                        break;
                                case 1: /* Increment before */
                                        Rn = Rn + 4;