+static const uint8_t arm_usr_indices[17] = {
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, ARMV4_5_CPSR,
+};
+
+static const uint8_t arm_fiq_indices[8] = {
+ 16, 17, 18, 19, 20, 21, 22, ARMV4_5_SPSR_FIQ,
+};
+
+static const uint8_t arm_irq_indices[3] = {
+ 23, 24, ARMV4_5_SPSR_IRQ,
+};
+
+static const uint8_t arm_svc_indices[3] = {
+ 25, 26, ARMV4_5_SPSR_SVC,
+};
+
+static const uint8_t arm_abt_indices[3] = {
+ 27, 28, ARMV4_5_SPSR_ABT,
+};
+
+static const uint8_t arm_und_indices[3] = {
+ 29, 30, ARMV4_5_SPSR_UND,
+};
+
+static const uint8_t arm_mon_indices[3] = {
+ 37, 38, ARM_SPSR_MON,
+};
+
+static const struct {
+ const char *name;
+ unsigned short psr;
+ /* For user and system modes, these list indices for all registers.
+ * otherwise they're just indices for the shadow registers and SPSR.
+ */
+ unsigned short n_indices;
+ const uint8_t *indices;
+} arm_mode_data[] = {
+ /* Seven modes are standard from ARM7 on. "System" and "User" share
+ * the same registers; other modes shadow from 3 to 8 registers.
+ */
+ {
+ .name = "User",
+ .psr = ARMV4_5_MODE_USR,
+ .n_indices = ARRAY_SIZE(arm_usr_indices),
+ .indices = arm_usr_indices,
+ },
+ {
+ .name = "FIQ",
+ .psr = ARMV4_5_MODE_FIQ,
+ .n_indices = ARRAY_SIZE(arm_fiq_indices),
+ .indices = arm_fiq_indices,
+ },
+ {
+ .name = "Supervisor",
+ .psr = ARMV4_5_MODE_SVC,
+ .n_indices = ARRAY_SIZE(arm_svc_indices),
+ .indices = arm_svc_indices,
+ },
+ {
+ .name = "Abort",
+ .psr = ARMV4_5_MODE_ABT,
+ .n_indices = ARRAY_SIZE(arm_abt_indices),
+ .indices = arm_abt_indices,
+ },
+ {
+ .name = "IRQ",
+ .psr = ARMV4_5_MODE_IRQ,
+ .n_indices = ARRAY_SIZE(arm_irq_indices),
+ .indices = arm_irq_indices,
+ },
+ {
+ .name = "Undefined instruction",
+ .psr = ARMV4_5_MODE_UND,
+ .n_indices = ARRAY_SIZE(arm_und_indices),
+ .indices = arm_und_indices,
+ },
+ {
+ .name = "System",
+ .psr = ARMV4_5_MODE_SYS,
+ .n_indices = ARRAY_SIZE(arm_usr_indices),
+ .indices = arm_usr_indices,
+ },
+ /* TrustZone "Security Extensions" add a secure monitor mode.
+ * This is distinct from a "debug monitor" which can support
+ * non-halting debug, in conjunction with some debuggers.
+ */
+ {
+ .name = "Secure Monitor",
+ .psr = ARM_MODE_MON,
+ .n_indices = ARRAY_SIZE(arm_mon_indices),
+ .indices = arm_mon_indices,
+ },