stlink: add none 32bit memory read/write functions

[openocd.git] / src / target / armv4_5.c

diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index d950af366403af53316e86f9cec2daf1a799288d..7468e389f442b68a0462009d472d9817465280ac 100644 (file)
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -612,7 +612,6 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
 {
        struct target *target = get_current_target(CMD_CTX);
        struct arm *armv4_5 = target_to_arm(target);
-       unsigned num_regs;
        struct reg *regs;
 
        if (!is_arm(armv4_5))
@@ -634,7 +633,10 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
        }
 
        if (!is_arm_mode(armv4_5->core_mode))
+       {
+               LOG_ERROR("not a valid arm core mode - communication failure?");
                return ERROR_FAIL;
+       }
 
        if (!armv4_5->full_context) {
                command_print(CMD_CTX, "error: target doesn't support %s",
@@ -642,7 +644,6 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
                return ERROR_FAIL;
        }
 
-       num_regs = armv4_5->core_cache->num_regs;
        regs = armv4_5->core_cache->reg_list;
 
        for (unsigned mode = 0; mode < ARRAY_SIZE(arm_mode_data); mode++) {
@@ -740,7 +741,13 @@ COMMAND_HANDLER(handle_arm_disassemble_command)
 {
        int retval = ERROR_OK;
        struct target *target = get_current_target(CMD_CTX);
-       struct arm *arm = target ? target_to_arm(target) : NULL;
+
+       if (target == NULL) {
+               LOG_ERROR("No target selected");
+               return ERROR_FAIL;
+       }
+
+       struct arm *arm = target_to_arm(target);
        uint32_t address;
        int count = 1;
        int thumb = 0;
@@ -777,10 +784,8 @@ COMMAND_HANDLER(handle_arm_disassemble_command)
                break;
        default:
 usage:
-               command_print(CMD_CTX,
-                       "usage: arm disassemble <address> [<count> ['thumb']]");
                count = 0;
-               retval = ERROR_FAIL;
+               retval = ERROR_COMMAND_SYNTAX_ERROR;
        }
 
        while (count-- > 0) {
@@ -945,7 +950,13 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
 COMMAND_HANDLER(handle_arm_semihosting_command)
 {
        struct target *target = get_current_target(CMD_CTX);
-       struct arm *arm = target ? target_to_arm(target) : NULL;
+
+       if (target == NULL) {
+               LOG_ERROR("No target selected");
+               return ERROR_FAIL;
+       }
+
+       struct arm *arm = target_to_arm(target);
 
        if (!is_arm(arm)) {
                command_print(CMD_CTX, "current target isn't an ARM");
@@ -955,6 +966,7 @@ COMMAND_HANDLER(handle_arm_semihosting_command)
        if (!arm->setup_semihosting)
        {
                command_print(CMD_CTX, "semihosting not supported for current target");
+               return ERROR_FAIL;
        }
 
        if (CMD_ARGC > 0)
@@ -1046,7 +1058,10 @@ int arm_get_gdb_reg_list(struct target *target,
        int i;
 
        if (!is_arm_mode(armv4_5->core_mode))
+       {
+               LOG_ERROR("not a valid arm core mode - communication failure?");
                return ERROR_FAIL;
+       }
 
        *reg_list_size = 26;
        *reg_list = malloc(sizeof(struct reg*) * (*reg_list_size));
@@ -1127,7 +1142,10 @@ int armv4_5_run_algorithm_inner(struct target *target,
        }
 
        if (!is_arm_mode(armv4_5->core_mode))
+       {
+               LOG_ERROR("not a valid arm core mode - communication failure?");
                return ERROR_FAIL;
+       }
 
        /* armv5 and later can terminate with BKPT instruction; less overhead */
        if (!exit_point && armv4_5->is_armv4)
@@ -1166,13 +1184,13 @@ int armv4_5_run_algorithm_inner(struct target *target,
                if (!reg)
                {
                        LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
-                       return ERROR_INVALID_ARGUMENTS;
+                       return ERROR_COMMAND_SYNTAX_ERROR;
                }
 
                if (reg->size != reg_params[i].size)
                {
                        LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
-                       return ERROR_INVALID_ARGUMENTS;
+                       return ERROR_COMMAND_SYNTAX_ERROR;
                }
 
                if ((retval = armv4_5_set_core_reg(reg, reg_params[i].value)) != ERROR_OK)
@@ -1189,7 +1207,7 @@ int armv4_5_run_algorithm_inner(struct target *target,
        else
        {
                LOG_ERROR("BUG: can't execute algorithms when not in ARM or Thumb state");
-               return ERROR_INVALID_ARGUMENTS;
+               return ERROR_COMMAND_SYNTAX_ERROR;
        }
 
        if (arm_algorithm_info->core_mode != ARM_MODE_ANY)
@@ -1241,14 +1259,14 @@ int armv4_5_run_algorithm_inner(struct target *target,
                        if (!reg)
                        {
                                LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
-                               retval = ERROR_INVALID_ARGUMENTS;
+                               retval = ERROR_COMMAND_SYNTAX_ERROR;
                                continue;
                        }
 
                        if (reg->size != reg_params[i].size)
                        {
                                LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
-                               retval = ERROR_INVALID_ARGUMENTS;
+                               retval = ERROR_COMMAND_SYNTAX_ERROR;
                                continue;
                        }
 
@@ -1298,6 +1316,8 @@ int arm_checksum_memory(struct target *target,
        uint32_t i;
        uint32_t exit_var = 0;
 
+       /* see contib/loaders/checksum/armv4_5_crc.s for src */
+
        static const uint32_t arm_crc_code[] = {
                0xE1A02000,             /* mov          r2, r0 */
                0xE3E00000,             /* mov          r0, #0xffffffff */