ARM: start generalized base type
[openocd.git] / src / target / armv4_5.h
index d76ce75920d79a78e86e434d5115adb401e4f27e..4d87c083e1f98195ff025d6dd3316c3bdab95809 100644 (file)
@@ -73,25 +73,51 @@ enum
 
 #define ARMV4_5_COMMON_MAGIC 0x0A450A45
 
-typedef struct armv4_5_common_s
+/* NOTE:  this is being morphed into a generic toplevel holder for ARMs. */
+#define armv4_5_common_s arm
+
+/**
+ * Represents a generic ARM core, with standard application registers.
+ *
+ * There are sixteen application registers (including PC, SP, LR) and a PSR.
+ * Cortex-M series cores do not support as many core states or shadowed
+ * registers as traditional ARM cores, and only support Thumb2 instructions.
+ */
+typedef struct arm
 {
        int common_magic;
        reg_cache_t *core_cache;
+
        int /* armv4_5_mode */ core_mode;
        enum armv4_5_state core_state;
+
+       /** Flag reporting unavailability of the BKPT instruction. */
        bool is_armv4;
+
+       /** Handle for the Embedded Trace Module, if one is present. */
+       struct etm *etm;
+
        int (*full_context)(struct target_s *target);
-       int (*read_core_reg)(struct target_s *target, int num, enum armv4_5_mode mode);
-       int (*write_core_reg)(struct target_s *target, int num, enum armv4_5_mode mode, uint32_t value);
+       int (*read_core_reg)(struct target_s *target,
+                       int num, enum armv4_5_mode mode);
+       int (*write_core_reg)(struct target_s *target,
+                       int num, enum armv4_5_mode mode, uint32_t value);
        void *arch_info;
 } armv4_5_common_t;
 
-static inline struct armv4_5_common_s *
-target_to_armv4_5(struct target_s *target)
+#define target_to_armv4_5 target_to_arm
+
+/** Convert target handle to generic ARM target state handle. */
+static inline struct arm *target_to_arm(struct target_s *target)
 {
        return target->arch_info;
 }
 
+static inline bool is_arm(struct arm *arm)
+{
+       return arm && arm->common_magic == ARMV4_5_COMMON_MAGIC;
+}
+
 typedef struct armv4_5_algorithm_s
 {
        int common_magic;

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)