ARM: remove per-register malloc

[openocd.git] / src / target / armv4_5.h

diff --git a/src/target/armv4_5.h b/src/target/armv4_5.h
index f9aa4baf7ef8b372b6ebebcf476761a9a7817cc6..50af57b36c716313acd786750a90c3da50bac494 100644 (file)
--- a/src/target/armv4_5.h
+++ b/src/target/armv4_5.h
@@ -52,11 +52,12 @@ typedef enum armv4_5_state
        ARMV4_5_STATE_ARM,
        ARMV4_5_STATE_THUMB,
        ARMV4_5_STATE_JAZELLE,
+       ARM_STATE_THUMB_EE,
 } armv4_5_state_t;
 
 extern char* armv4_5_state_strings[];
 
-extern const int armv4_5_core_reg_map[7][17];
+extern const int armv4_5_core_reg_map[8][17];
 
 #define ARMV4_5_CORE_REG_MODE(cache, mode, num) \
                cache->reg_list[armv4_5_core_reg_map[armv4_5_mode_to_number(mode)][num]]
@@ -69,7 +70,8 @@ enum
        ARMV4_5_SPSR_IRQ = 33,
        ARMV4_5_SPSR_SVC = 34,
        ARMV4_5_SPSR_ABT = 35,
-       ARMV4_5_SPSR_UND = 36
+       ARMV4_5_SPSR_UND = 36,
+       ARM_SPSR_MON = 39,
 };
 
 #define ARMV4_5_COMMON_MAGIC 0x0A450A45
@@ -141,6 +143,7 @@ struct armv4_5_core_reg
        enum armv4_5_mode mode;
        struct target *target;
        struct arm *armv4_5_common;
+       uint32_t value;
 };
 
 struct reg_cache* armv4_5_build_reg_cache(struct target *target,