* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
+ * *
+ * You should have received a copy of the GNU General Public License *
+ * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
{
struct armv7a_common *armv7a = target_to_armv7a(target);
struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
- (armv7a->armv7a_mmu.armv7a_cache.l2_cache);
+ (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
if (target->state != TARGET_HALTED) {
LOG_ERROR("%s: target not halted", __func__);
/*
* clean and invalidate complete l2x cache
*/
-static int arm7a_l2x_flush_all_data(struct target *target)
+int arm7a_l2x_flush_all_data(struct target *target)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
- (armv7a->armv7a_mmu.armv7a_cache.l2_cache);
+ (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
uint32_t l2_way_val;
int retval;
l2_way_val = (1 << l2x_cache->way) - 1;
- return target_write_phys_memory(target,
+ return target_write_phys_u32(target,
l2x_cache->base + L2X0_CLEAN_INV_WAY,
- 4, 1, (uint8_t *)&l2_way_val);
+ l2_way_val);
}
-int armv7a_l2x_cache_flush_virt(struct target *target, uint32_t virt,
+int armv7a_l2x_cache_flush_virt(struct target *target, target_addr_t virt,
uint32_t size)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
- (armv7a->armv7a_mmu.armv7a_cache.l2_cache);
+ (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
/* FIXME: different controllers have different linelen? */
uint32_t i, linelen = 32;
int retval;
return retval;
for (i = 0; i < size; i += linelen) {
- uint32_t pa, offs = virt + i;
+ target_addr_t pa, offs = virt + i;
/* FIXME: use less verbose virt2phys? */
retval = target->type->virt2phys(target, offs, &pa);
if (retval != ERROR_OK)
goto done;
- retval = target_write_phys_memory(target,
- l2x_cache->base + L2X0_CLEAN_INV_LINE_PA,
- 4, 1, (uint8_t *)&pa);
+ retval = target_write_phys_u32(target,
+ l2x_cache->base + L2X0_CLEAN_INV_LINE_PA, pa);
if (retval != ERROR_OK)
goto done;
}
return retval;
}
-static int armv7a_l2x_cache_inval_virt(struct target *target, uint32_t virt,
+static int armv7a_l2x_cache_inval_virt(struct target *target, target_addr_t virt,
uint32_t size)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
- (armv7a->armv7a_mmu.armv7a_cache.l2_cache);
+ (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
/* FIXME: different controllers have different linelen */
uint32_t i, linelen = 32;
int retval;
return retval;
for (i = 0; i < size; i += linelen) {
- uint32_t pa, offs = virt + i;
+ target_addr_t pa, offs = virt + i;
/* FIXME: use less verbose virt2phys? */
retval = target->type->virt2phys(target, offs, &pa);
if (retval != ERROR_OK)
goto done;
- retval = target_write_phys_memory(target,
- l2x_cache->base + L2X0_INV_LINE_PA,
- 4, 1, (uint8_t *)&pa);
+ retval = target_write_phys_u32(target,
+ l2x_cache->base + L2X0_INV_LINE_PA, pa);
if (retval != ERROR_OK)
goto done;
}
return retval;
}
-static int armv7a_l2x_cache_clean_virt(struct target *target, uint32_t virt,
+static int armv7a_l2x_cache_clean_virt(struct target *target, target_addr_t virt,
unsigned int size)
{
struct armv7a_common *armv7a = target_to_armv7a(target);
struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
- (armv7a->armv7a_mmu.armv7a_cache.l2_cache);
+ (armv7a->armv7a_mmu.armv7a_cache.outer_cache);
/* FIXME: different controllers have different linelen */
uint32_t i, linelen = 32;
int retval;
return retval;
for (i = 0; i < size; i += linelen) {
- uint32_t pa, offs = virt + i;
+ target_addr_t pa, offs = virt + i;
/* FIXME: use less verbose virt2phys? */
retval = target->type->virt2phys(target, offs, &pa);
if (retval != ERROR_OK)
goto done;
- retval = target_write_phys_memory(target,
- l2x_cache->base + L2X0_CLEAN_LINE_PA,
- 4, 1, (uint8_t *)&pa);
+ retval = target_write_phys_u32(target,
+ l2x_cache->base + L2X0_CLEAN_LINE_PA, pa);
if (retval != ERROR_OK)
goto done;
}
struct armv7a_cache_common *armv7a_cache)
{
struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
- (armv7a_cache->l2_cache);
+ (armv7a_cache->outer_cache);
- if (armv7a_cache->ctype == -1) {
+ if (armv7a_cache->info == -1) {
command_print(cmd_ctx, "cache not yet identified");
return ERROR_OK;
}
struct target *curr;
struct armv7a_common *armv7a = target_to_armv7a(target);
- if (armv7a->armv7a_mmu.armv7a_cache.l2_cache) {
+ if (armv7a->armv7a_mmu.armv7a_cache.outer_cache) {
LOG_ERROR("L2 cache was already initialised\n");
return ERROR_FAIL;
}
l2x_cache = calloc(1, sizeof(struct armv7a_l2x_cache));
l2x_cache->base = base;
l2x_cache->way = way;
- armv7a->armv7a_mmu.armv7a_cache.l2_cache = l2x_cache;
+ armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
/* initialize all targets in this cluster (smp target)
* l2 cache must be configured after smp declaration */
curr = head->target;
if (curr != target) {
armv7a = target_to_armv7a(curr);
- if (armv7a->armv7a_mmu.armv7a_cache.l2_cache) {
+ if (armv7a->armv7a_mmu.armv7a_cache.outer_cache) {
LOG_ERROR("smp target : cache l2 already initialized\n");
return ERROR_FAIL;
}
- armv7a->armv7a_mmu.armv7a_cache.l2_cache = l2x_cache;
+ armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
}
head = head->next;
}
COMMAND_HANDLER(arm7a_l2x_cache_flush_virt_cmd)
{
struct target *target = get_current_target(CMD_CTX);
- uint32_t virt, size;
+ target_addr_t virt;
+ uint32_t size;
if (CMD_ARGC == 0 || CMD_ARGC > 2)
return ERROR_COMMAND_SYNTAX_ERROR;
else
size = 1;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], virt);
+ COMMAND_PARSE_ADDRESS(CMD_ARGV[0], virt);
return armv7a_l2x_cache_flush_virt(target, virt, size);
}
COMMAND_HANDLER(arm7a_l2x_cache_inval_virt_cmd)
{
struct target *target = get_current_target(CMD_CTX);
- uint32_t virt, size;
+ target_addr_t virt;
+ uint32_t size;
if (CMD_ARGC == 0 || CMD_ARGC > 2)
return ERROR_COMMAND_SYNTAX_ERROR;
else
size = 1;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], virt);
+ COMMAND_PARSE_ADDRESS(CMD_ARGV[0], virt);
return armv7a_l2x_cache_inval_virt(target, virt, size);
}
COMMAND_HANDLER(arm7a_l2x_cache_clean_virt_cmd)
{
struct target *target = get_current_target(CMD_CTX);
- uint32_t virt, size;
+ target_addr_t virt;
+ uint32_t size;
if (CMD_ARGC == 0 || CMD_ARGC > 2)
return ERROR_COMMAND_SYNTAX_ERROR;
else
size = 1;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], virt);
+ COMMAND_PARSE_ADDRESS(CMD_ARGV[0], virt);
return armv7a_l2x_cache_clean_virt(target, virt, size);
}