target: fix handle_profile_command variable typo

[openocd.git] / src / target / armv7m.c

diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 92ebb95be18b0d27fa8e4ef3231435ed20554541..58cec58875d9225033eec22358715f70500b76da 100644 (file)
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -52,7 +52,7 @@ static char *armv7m_exception_strings[] = {
 };
 
 /* PSP is used in some thread modes */
-const int armv7m_psp_reg_map[17] = {
+const int armv7m_psp_reg_map[ARMV7M_NUM_CORE_REGS] = {
        ARMV7M_R0, ARMV7M_R1, ARMV7M_R2, ARMV7M_R3,
        ARMV7M_R4, ARMV7M_R5, ARMV7M_R6, ARMV7M_R7,
        ARMV7M_R8, ARMV7M_R9, ARMV7M_R10, ARMV7M_R11,
@@ -61,7 +61,7 @@ const int armv7m_psp_reg_map[17] = {
 };
 
 /* MSP is used in handler and some thread modes */
-const int armv7m_msp_reg_map[17] = {
+const int armv7m_msp_reg_map[ARMV7M_NUM_CORE_REGS] = {
        ARMV7M_R0, ARMV7M_R1, ARMV7M_R2, ARMV7M_R3,
        ARMV7M_R4, ARMV7M_R5, ARMV7M_R6, ARMV7M_R7,
        ARMV7M_R8, ARMV7M_R9, ARMV7M_R10, ARMV7M_R11,
@@ -216,24 +216,22 @@ static int armv7m_write_core_reg(struct target *target, struct reg *r,
        int num, enum arm_mode mode, uint32_t value)
 {
        int retval;
-       uint32_t reg_value;
        struct arm_reg *armv7m_core_reg;
        struct armv7m_common *armv7m = target_to_armv7m(target);
 
        assert(num < (int)armv7m->arm.core_cache->num_regs);
 
-       reg_value = buf_get_u32(armv7m->arm.core_cache->reg_list[num].value, 0, 32);
        armv7m_core_reg = armv7m->arm.core_cache->reg_list[num].arch_info;
        retval = armv7m->store_core_reg_u32(target,
-                       armv7m_core_reg->num,
-                       reg_value);
+                                           armv7m_core_reg->num,
+                                           value);
        if (retval != ERROR_OK) {
                LOG_ERROR("JTAG failure");
                armv7m->arm.core_cache->reg_list[num].dirty = armv7m->arm.core_cache->reg_list[num].valid;
                return ERROR_JTAG_DEVICE_ERROR;
        }
 
-       LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num, reg_value);
+       LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num, value);
        armv7m->arm.core_cache->reg_list[num].valid = 1;
        armv7m->arm.core_cache->reg_list[num].dirty = 0;
 
@@ -252,7 +250,7 @@ int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[],
        if (reg_class == REG_CLASS_ALL)
                *reg_list_size = ARMV7M_NUM_REGS;
        else
-               *reg_list_size = 17;
+               *reg_list_size = ARMV7M_NUM_CORE_REGS;
 
        *reg_list = malloc(sizeof(struct reg *) * (*reg_list_size));
        if (*reg_list == NULL)
@@ -602,7 +600,7 @@ int armv7m_checksum_memory(struct target *target,
 
        /* see contrib/loaders/checksum/armv7m_crc.s for src */
 
-       static const uint8_t cortex_m3_crc_code[] = {
+       static const uint8_t cortex_m_crc_code[] = {
                /* main: */
                0x02, 0x46,                     /* mov          r2, r0 */
                0x00, 0x20,                     /* movs         r0, #0 */
@@ -636,12 +634,12 @@ int armv7m_checksum_memory(struct target *target,
                0xB7, 0x1D, 0xC1, 0x04  /* CRC32XOR:    .word   0x04c11db7 */
        };
 
-       retval = target_alloc_working_area(target, sizeof(cortex_m3_crc_code), &crc_algorithm);
+       retval = target_alloc_working_area(target, sizeof(cortex_m_crc_code), &crc_algorithm);
        if (retval != ERROR_OK)
                return retval;
 
        retval = target_write_buffer(target, crc_algorithm->address,
-                       sizeof(cortex_m3_crc_code), (uint8_t *)cortex_m3_crc_code);
+                       sizeof(cortex_m_crc_code), (uint8_t *)cortex_m_crc_code);
        if (retval != ERROR_OK)
                goto cleanup;
 
@@ -657,7 +655,7 @@ int armv7m_checksum_memory(struct target *target,
        int timeout = 20000 * (1 + (count / (1024 * 1024)));
 
        retval = target_run_algorithm(target, 0, NULL, 2, reg_params, crc_algorithm->address,
-                       crc_algorithm->address + (sizeof(cortex_m3_crc_code) - 6),
+                       crc_algorithm->address + (sizeof(cortex_m_crc_code) - 6),
                        timeout, &armv7m_info);
 
        if (retval == ERROR_OK)