#include "config.h"
#endif
+#include "breakpoints.h"
#include "armv7m.h"
-
-#define ARRAY_SIZE(x) ((int)(sizeof(x)/sizeof((x)[0])))
+#include "algorithm.h"
+#include "register.h"
#if 0
"DebugMonitor", "RESERVED", "PendSV", "SysTick"
};
-static uint8_t armv7m_gdb_dummy_fp_value[12] = {
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-};
-
-static reg_t armv7m_gdb_dummy_fp_reg =
-{
- "GDB dummy floating-point register", armv7m_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0
-};
-
-static uint8_t armv7m_gdb_dummy_fps_value[] = {0, 0, 0, 0};
-
-static reg_t armv7m_gdb_dummy_fps_reg =
-{
- "GDB dummy floating-point status register", armv7m_gdb_dummy_fps_value, 0, 1, 32, NULL, 0, NULL, 0
-};
-
#ifdef ARMV7_GDB_HACKS
uint8_t armv7m_gdb_dummy_cpsr_value[] = {0, 0, 0, 0};
-reg_t armv7m_gdb_dummy_cpsr_reg =
+struct reg armv7m_gdb_dummy_cpsr_reg =
{
- "GDB dummy cpsr register", armv7m_gdb_dummy_cpsr_value, 0, 1, 32, NULL, 0, NULL, 0
+ .name = "GDB dummy cpsr register",
+ .value = armv7m_gdb_dummy_cpsr_value,
+ .dirty = 0,
+ .valid = 1,
+ .size = 32,
+ .arch_info = NULL,
};
#endif
#define ARMV7M_NUM_REGS ARRAY_SIZE(armv7m_regs)
-static int armv7m_core_reg_arch_type = -1;
-
/**
* Restores target context using the cache of core registers set up
* by armv7m_build_reg_cache(), calling optional core-specific hooks.
*/
-int armv7m_restore_context(target_t *target)
+int armv7m_restore_context(struct target *target)
{
int i;
- struct armv7m_common_s *armv7m = target_to_armv7m(target);
+ struct armv7m_common *armv7m = target_to_armv7m(target);
LOG_DEBUG(" ");
return enamebuf;
}
-static int armv7m_get_core_reg(reg_t *reg)
+static int armv7m_get_core_reg(struct reg *reg)
{
int retval;
- armv7m_core_reg_t *armv7m_reg = reg->arch_info;
- target_t *target = armv7m_reg->target;
- struct armv7m_common_s *armv7m = target_to_armv7m(target);
+ struct armv7m_core_reg *armv7m_reg = reg->arch_info;
+ struct target *target = armv7m_reg->target;
+ struct armv7m_common *armv7m = target_to_armv7m(target);
if (target->state != TARGET_HALTED)
{
return retval;
}
-static int armv7m_set_core_reg(reg_t *reg, uint8_t *buf)
+static int armv7m_set_core_reg(struct reg *reg, uint8_t *buf)
{
- armv7m_core_reg_t *armv7m_reg = reg->arch_info;
- target_t *target = armv7m_reg->target;
+ struct armv7m_core_reg *armv7m_reg = reg->arch_info;
+ struct target *target = armv7m_reg->target;
uint32_t value = buf_get_u32(buf, 0, 32);
if (target->state != TARGET_HALTED)
return ERROR_OK;
}
-static int armv7m_read_core_reg(struct target_s *target, int num)
+static int armv7m_read_core_reg(struct target *target, unsigned num)
{
uint32_t reg_value;
int retval;
- armv7m_core_reg_t * armv7m_core_reg;
- struct armv7m_common_s *armv7m = target_to_armv7m(target);
+ struct armv7m_core_reg * armv7m_core_reg;
+ struct armv7m_common *armv7m = target_to_armv7m(target);
- if ((num < 0) || (num >= ARMV7M_NUM_REGS))
+ if (num >= ARMV7M_NUM_REGS)
return ERROR_INVALID_ARGUMENTS;
armv7m_core_reg = armv7m->core_cache->reg_list[num].arch_info;
return retval;
}
-static int armv7m_write_core_reg(struct target_s *target, int num)
+static int armv7m_write_core_reg(struct target *target, unsigned num)
{
int retval;
uint32_t reg_value;
- armv7m_core_reg_t *armv7m_core_reg;
- struct armv7m_common_s *armv7m = target_to_armv7m(target);
+ struct armv7m_core_reg *armv7m_core_reg;
+ struct armv7m_common *armv7m = target_to_armv7m(target);
- if ((num < 0) || (num >= ARMV7M_NUM_REGS))
+ if (num >= ARMV7M_NUM_REGS)
return ERROR_INVALID_ARGUMENTS;
reg_value = buf_get_u32(armv7m->core_cache->reg_list[num].value, 0, 32);
return ERROR_OK;
}
-/** Invalidates cache of core registers set up by armv7m_build_reg_cache(). */
-int armv7m_invalidate_core_regs(target_t *target)
-{
- struct armv7m_common_s *armv7m = target_to_armv7m(target);
- int i;
-
- for (i = 0; i < armv7m->core_cache->num_regs; i++)
- {
- armv7m->core_cache->reg_list[i].valid = 0;
- armv7m->core_cache->reg_list[i].dirty = 0;
- }
-
- return ERROR_OK;
-}
-
/**
* Returns generic ARM userspace registers to GDB.
* GDB doesn't quite understand that most ARMs don't have floating point
* hardware, so this also fakes a set of long-obsolete FPA registers that
* are not used in EABI based software stacks.
*/
-int armv7m_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size)
+int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int *reg_list_size)
{
- struct armv7m_common_s *armv7m = target_to_armv7m(target);
+ struct armv7m_common *armv7m = target_to_armv7m(target);
int i;
*reg_list_size = 26;
- *reg_list = malloc(sizeof(reg_t*) * (*reg_list_size));
+ *reg_list = malloc(sizeof(struct reg*) * (*reg_list_size));
/*
* GDB register packet format for ARM:
}
for (i = 16; i < 24; i++)
- {
- (*reg_list)[i] = &armv7m_gdb_dummy_fp_reg;
- }
-
- (*reg_list)[24] = &armv7m_gdb_dummy_fps_reg;
+ (*reg_list)[i] = &arm_gdb_dummy_fp_reg;
+ (*reg_list)[24] = &arm_gdb_dummy_fps_reg;
#ifdef ARMV7_GDB_HACKS
/* use dummy cpsr reg otherwise gdb may try and set the thumb bit */
}
/* run to exit point. return error if exit point was not reached. */
-static int armv7m_run_and_wait(struct target_s *target, uint32_t entry_point, int timeout_ms, uint32_t exit_point, armv7m_common_t *armv7m)
+static int armv7m_run_and_wait(struct target *target, uint32_t entry_point, int timeout_ms, uint32_t exit_point, struct armv7m_common *armv7m)
{
uint32_t pc;
int retval;
}
/** Runs a Thumb algorithm in the target. */
-int armv7m_run_algorithm(struct target_s *target,
- int num_mem_params, mem_param_t *mem_params,
- int num_reg_params, reg_param_t *reg_params,
+int armv7m_run_algorithm(struct target *target,
+ int num_mem_params, struct mem_param *mem_params,
+ int num_reg_params, struct reg_param *reg_params,
uint32_t entry_point, uint32_t exit_point,
int timeout_ms, void *arch_info)
{
- struct armv7m_common_s *armv7m = target_to_armv7m(target);
- armv7m_algorithm_t *armv7m_algorithm_info = arch_info;
+ struct armv7m_common *armv7m = target_to_armv7m(target);
+ struct armv7m_algorithm *armv7m_algorithm_info = arch_info;
enum armv7m_mode core_mode = armv7m->core_mode;
int retval = ERROR_OK;
- int i;
uint32_t context[ARMV7M_NUM_REGS];
if (armv7m_algorithm_info->common_magic != ARMV7M_COMMON_MAGIC)
/* refresh core register cache */
/* Not needed if core register cache is always consistent with target process state */
- for (i = 0; i < ARMV7M_NUM_REGS; i++)
+ for (unsigned i = 0; i < ARMV7M_NUM_REGS; i++)
{
if (!armv7m->core_cache->reg_list[i].valid)
armv7m->read_core_reg(target, i);
context[i] = buf_get_u32(armv7m->core_cache->reg_list[i].value, 0, 32);
}
- for (i = 0; i < num_mem_params; i++)
+ for (int i = 0; i < num_mem_params; i++)
{
if ((retval = target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value)) != ERROR_OK)
return retval;
}
- for (i = 0; i < num_reg_params; i++)
+ for (int i = 0; i < num_reg_params; i++)
{
- reg_t *reg = register_get_by_name(armv7m->core_cache, reg_params[i].reg_name, 0);
+ struct reg *reg = register_get_by_name(armv7m->core_cache, reg_params[i].reg_name, 0);
// uint32_t regvalue;
if (!reg)
{
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
- exit(-1);
+ return ERROR_INVALID_ARGUMENTS;
}
if (reg->size != reg_params[i].size)
{
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
- exit(-1);
+ return ERROR_INVALID_ARGUMENTS;
}
// regvalue = buf_get_u32(reg_params[i].value, 0, 32);
}
/* Read memory values to mem_params[] */
- for (i = 0; i < num_mem_params; i++)
+ for (int i = 0; i < num_mem_params; i++)
{
if (mem_params[i].direction != PARAM_OUT)
if ((retval = target_read_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value)) != ERROR_OK)
}
/* Copy core register values to reg_params[] */
- for (i = 0; i < num_reg_params; i++)
+ for (int i = 0; i < num_reg_params; i++)
{
if (reg_params[i].direction != PARAM_OUT)
{
- reg_t *reg = register_get_by_name(armv7m->core_cache, reg_params[i].reg_name, 0);
+ struct reg *reg = register_get_by_name(armv7m->core_cache, reg_params[i].reg_name, 0);
if (!reg)
{
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
- exit(-1);
+ return ERROR_INVALID_ARGUMENTS;
}
if (reg->size != reg_params[i].size)
{
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
- exit(-1);
+ return ERROR_INVALID_ARGUMENTS;
}
buf_set_u32(reg_params[i].value, 0, 32, buf_get_u32(reg->value, 0, 32));
}
}
- for (i = ARMV7M_NUM_REGS - 1; i >= 0; i--)
+ for (int i = ARMV7M_NUM_REGS - 1; i >= 0; i--)
{
uint32_t regvalue;
regvalue = buf_get_u32(armv7m->core_cache->reg_list[i].value, 0, 32);
}
/** Logs summary of ARMv7-M state for a halted target. */
-int armv7m_arch_state(struct target_s *target)
+int armv7m_arch_state(struct target *target)
{
- struct armv7m_common_s *armv7m = target_to_armv7m(target);
+ struct armv7m_common *armv7m = target_to_armv7m(target);
uint32_t ctrl, sp;
ctrl = buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_CONTROL].value, 0, 32);
return ERROR_OK;
}
+static const struct reg_arch_type armv7m_reg_type = {
+ .get = armv7m_get_core_reg,
+ .set = armv7m_set_core_reg,
+};
/** Builds cache of architecturally defined registers. */
-reg_cache_t *armv7m_build_reg_cache(target_t *target)
+struct reg_cache *armv7m_build_reg_cache(struct target *target)
{
- struct armv7m_common_s *armv7m = target_to_armv7m(target);
+ struct armv7m_common *armv7m = target_to_armv7m(target);
int num_regs = ARMV7M_NUM_REGS;
- reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
- reg_cache_t *cache = malloc(sizeof(reg_cache_t));
- reg_t *reg_list = calloc(num_regs, sizeof(reg_t));
- armv7m_core_reg_t *arch_info = calloc(num_regs, sizeof(armv7m_core_reg_t));
+ struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
+ struct reg_cache *cache = malloc(sizeof(struct reg_cache));
+ struct reg *reg_list = calloc(num_regs, sizeof(struct reg));
+ struct armv7m_core_reg *arch_info = calloc(num_regs, sizeof(struct armv7m_core_reg));
int i;
- if (armv7m_core_reg_arch_type == -1)
- {
- armv7m_core_reg_arch_type = register_reg_arch_type(armv7m_get_core_reg, armv7m_set_core_reg);
- }
-
- register_init_dummy(&armv7m_gdb_dummy_fps_reg);
#ifdef ARMV7_GDB_HACKS
register_init_dummy(&armv7m_gdb_dummy_cpsr_reg);
#endif
- register_init_dummy(&armv7m_gdb_dummy_fp_reg);
/* Build the process context cache */
cache->name = "arm v7m registers";
reg_list[i].value = calloc(1, 4);
reg_list[i].dirty = 0;
reg_list[i].valid = 0;
- reg_list[i].bitfield_desc = NULL;
- reg_list[i].num_bitfields = 0;
- reg_list[i].arch_type = armv7m_core_reg_arch_type;
+ reg_list[i].type = &armv7m_reg_type;
reg_list[i].arch_info = &arch_info[i];
}
}
/** Sets up target as a generic ARMv7-M core */
-int armv7m_init_arch_info(target_t *target, armv7m_common_t *armv7m)
+int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m)
{
/* register arch-specific functions */
}
/** Generates a CRC32 checksum of a memory region. */
-int armv7m_checksum_memory(struct target_s *target,
+int armv7m_checksum_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t* checksum)
{
- working_area_t *crc_algorithm;
- armv7m_algorithm_t armv7m_info;
- reg_param_t reg_params[2];
+ struct working_area *crc_algorithm;
+ struct armv7m_algorithm armv7m_info;
+ struct reg_param reg_params[2];
int retval;
static const uint16_t cortex_m3_crc_code[] = {
}
/** Checks whether a memory region is zeroed. */
-int armv7m_blank_check_memory(struct target_s *target,
+int armv7m_blank_check_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t* blank)
{
- working_area_t *erase_check_algorithm;
- reg_param_t reg_params[3];
- armv7m_algorithm_t armv7m_info;
+ struct working_area *erase_check_algorithm;
+ struct reg_param reg_params[3];
+ struct armv7m_algorithm armv7m_info;
int retval;
uint32_t i;
*/
COMMAND_HANDLER(handle_dap_baseaddr_command)
{
- target_t *target = get_current_target(cmd_ctx);
- struct armv7m_common_s *armv7m = target_to_armv7m(target);
- swjdp_common_t *swjdp = &armv7m->swjdp_info;
+ struct target *target = get_current_target(CMD_CTX);
+ struct armv7m_common *armv7m = target_to_armv7m(target);
+ struct swjdp_common *swjdp = &armv7m->swjdp_info;
uint32_t apsel, apselsave, baseaddr;
int retval;
apselsave = swjdp->apsel;
- switch (argc) {
+ switch (CMD_ARGC) {
case 0:
apsel = swjdp->apsel;
break;
case 1:
- COMMAND_PARSE_NUMBER(u32, args[0], apsel);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
break;
default:
return ERROR_COMMAND_SYNTAX_ERROR;
dap_ap_read_reg_u32(swjdp, 0xF8, &baseaddr);
retval = swjdp_transaction_endcheck(swjdp);
- command_print(cmd_ctx, "0x%8.8" PRIx32 "", baseaddr);
+ command_print(CMD_CTX, "0x%8.8" PRIx32 "", baseaddr);
if (apselsave != apsel)
dap_ap_select(swjdp, apselsave);
*/
COMMAND_HANDLER(handle_dap_apid_command)
{
- target_t *target = get_current_target(cmd_ctx);
- struct armv7m_common_s *armv7m = target_to_armv7m(target);
- swjdp_common_t *swjdp = &armv7m->swjdp_info;
+ struct target *target = get_current_target(CMD_CTX);
+ struct armv7m_common *armv7m = target_to_armv7m(target);
+ struct swjdp_common *swjdp = &armv7m->swjdp_info;
- return dap_apid_command(cmd_ctx, swjdp, args, argc);
+ return CALL_COMMAND_HANDLER(dap_apid_command, swjdp);
}
COMMAND_HANDLER(handle_dap_apsel_command)
{
- target_t *target = get_current_target(cmd_ctx);
- struct armv7m_common_s *armv7m = target_to_armv7m(target);
- swjdp_common_t *swjdp = &armv7m->swjdp_info;
+ struct target *target = get_current_target(CMD_CTX);
+ struct armv7m_common *armv7m = target_to_armv7m(target);
+ struct swjdp_common *swjdp = &armv7m->swjdp_info;
- return dap_apsel_command(cmd_ctx, swjdp, args, argc);
+ return CALL_COMMAND_HANDLER(dap_apsel_command, swjdp);
}
COMMAND_HANDLER(handle_dap_memaccess_command)
{
- target_t *target = get_current_target(cmd_ctx);
- struct armv7m_common_s *armv7m = target_to_armv7m(target);
- swjdp_common_t *swjdp = &armv7m->swjdp_info;
+ struct target *target = get_current_target(CMD_CTX);
+ struct armv7m_common *armv7m = target_to_armv7m(target);
+ struct swjdp_common *swjdp = &armv7m->swjdp_info;
- return dap_memaccess_command(cmd_ctx, swjdp, args, argc);
+ return CALL_COMMAND_HANDLER(dap_memaccess_command, swjdp);
}
COMMAND_HANDLER(handle_dap_info_command)
{
- target_t *target = get_current_target(cmd_ctx);
- struct armv7m_common_s *armv7m = target_to_armv7m(target);
- swjdp_common_t *swjdp = &armv7m->swjdp_info;
+ struct target *target = get_current_target(CMD_CTX);
+ struct armv7m_common *armv7m = target_to_armv7m(target);
+ struct swjdp_common *swjdp = &armv7m->swjdp_info;
uint32_t apsel;
- switch (argc) {
+ switch (CMD_ARGC) {
case 0:
apsel = swjdp->apsel;
break;
case 1:
- COMMAND_PARSE_NUMBER(u32, args[0], apsel);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
break;
default:
return ERROR_COMMAND_SYNTAX_ERROR;
}
- return dap_info_command(cmd_ctx, swjdp, apsel);
+ return dap_info_command(CMD_CTX, swjdp, apsel);
}
/** Registers commands used to access DAP resources. */
-int armv7m_register_commands(struct command_context_s *cmd_ctx)
+int armv7m_register_commands(struct command_context *cmd_ctx)
{
- command_t *arm_adi_v5_dap_cmd;
+ struct command *arm_adi_v5_dap_cmd;
arm_adi_v5_dap_cmd = register_command(cmd_ctx, NULL, "dap",
NULL, COMMAND_ANY,
Code Review / openocd.git / blobdiff