}
for (int i = 0; i < num_reg_params; i++) {
+ if (reg_params[i].direction == PARAM_IN)
+ continue;
+
struct reg *reg =
register_get_by_name(armv7m->arm.core_cache, reg_params[i].reg_name, 0);
/* uint32_t regvalue; */
armv7m_set_core_reg(reg, reg_params[i].value);
}
+ {
+ /*
+ * Ensure xPSR.T is set to avoid trying to run things in arm
+ * (non-thumb) mode, which armv7m does not support.
+ *
+ * We do this by setting the entirety of xPSR, which should
+ * remove all the unknowns about xPSR state.
+ *
+ * Because xPSR.T is populated on reset from the vector table,
+ * it might be 0 if the vector table has "bad" data in it.
+ */
+ struct reg *reg = &armv7m->arm.core_cache->reg_list[ARMV7M_xPSR];
+ buf_set_u32(reg->value, 0, 32, 0x01000000);
+ reg->valid = 1;
+ reg->dirty = 1;
+ }
+
if (armv7m_algorithm_info->core_mode != ARM_MODE_ANY &&
armv7m_algorithm_info->core_mode != core_mode) {
uint32_t ctrl, sp;
/* avoid filling log waiting for fileio reply */
- if (target->semihosting->hit_fileio)
+ if (target->semihosting && target->semihosting->hit_fileio)
return ERROR_OK;
ctrl = buf_get_u32(arm->core_cache->reg_list[ARMV7M_CONTROL].value, 0, 32);
buf_get_u32(arm->pc->value, 0, 32),
(ctrl & 0x02) ? 'p' : 'm',
sp,
- target->semihosting->is_active ? ", semihosting" : "",
- target->semihosting->is_fileio ? " fileio" : "");
+ (target->semihosting && target->semihosting->is_active) ? ", semihosting" : "",
+ (target->semihosting && target->semihosting->is_fileio) ? " fileio" : "");
return ERROR_OK;
}