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simplify debug_reason check
[openocd.git] / src / target / armv7m.c
diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 31db2c79fb32080d817b36141164c36ab85c4804..fe8bc3ba9140160acb6726daa72255009b54cebc 100644 (file)
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -231,7 +231,7 @@ int armv7m_write_core_reg(struct target_s *target, int num)
                armv7m->core_cache->reg_list[num].dirty = armv7m->core_cache->reg_list[num].valid;
                return ERROR_JTAG_DEVICE_ERROR;
        }
-       LOG_DEBUG("write core reg %i value 0x%x", num , reg_value);
+       LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num , reg_value);
        armv7m->core_cache->reg_list[num].valid = 1;
        armv7m->core_cache->reg_list[num].dirty = 0;
 
@@ -295,7 +295,7 @@ static int armv7m_run_and_wait(struct target_s *target, uint32_t entry_point, in
        int retval;
        /* This code relies on the target specific  resume() and  poll()->debug_entry()
         * sequence to write register values to the processor and the read them back */
-       if((retval = target_resume(target, 0, entry_point, 1, 1)) != ERROR_OK)
+       if ((retval = target_resume(target, 0, entry_point, 1, 1)) != ERROR_OK)
        {
                return retval;
        }
@@ -304,9 +304,9 @@ static int armv7m_run_and_wait(struct target_s *target, uint32_t entry_point, in
        /* If the target fails to halt due to the breakpoint, force a halt */
        if (retval != ERROR_OK || target->state != TARGET_HALTED)
        {
-               if ((retval=target_halt(target))!=ERROR_OK)
+               if ((retval = target_halt(target)) != ERROR_OK)
                        return retval;
-               if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK)
+               if ((retval = target_wait_state(target, TARGET_HALTED, 500)) != ERROR_OK)
                {
                        return retval;
                }
@@ -316,7 +316,7 @@ static int armv7m_run_and_wait(struct target_s *target, uint32_t entry_point, in
        armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
        if (pc != exit_point)
        {
-               LOG_DEBUG("failed algoritm halted at 0x%x ", pc);
+               LOG_DEBUG("failed algoritm halted at 0x%" PRIx32 " ", pc);
                return ERROR_TARGET_TIMEOUT;
        }
 
@@ -356,7 +356,7 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
 
        for (i = 0; i < num_mem_params; i++)
        {
-               if ((retval=target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value))!=ERROR_OK)
+               if ((retval = target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value)) != ERROR_OK)
                        return retval;
        }
 
@@ -409,7 +409,7 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
        for (i = 0; i < num_mem_params; i++)
        {
                if (mem_params[i].direction != PARAM_OUT)
-                       if((retval = target_read_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value)) != ERROR_OK)
+                       if ((retval = target_read_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value)) != ERROR_OK)
                        {
                                return retval;
                        }
@@ -444,7 +444,7 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
                regvalue = buf_get_u32(armv7m->core_cache->reg_list[i].value, 0, 32);
                if (regvalue != context[i])
                {
-                       LOG_DEBUG("restoring register %s with value 0x%8.8x", armv7m->core_cache->reg_list[i].name, context[i]);
+                       LOG_DEBUG("restoring register %s with value 0x%8.8" PRIx32 "", armv7m->core_cache->reg_list[i].name, context[i]);
                        buf_set_u32(armv7m->core_cache->reg_list[i].value, 0, 32, context[i]);
                        armv7m->core_cache->reg_list[i].valid = 1;
                        armv7m->core_cache->reg_list[i].dirty = 1;
@@ -461,8 +461,8 @@ int armv7m_arch_state(struct target_s *target)
        /* get pointers to arch-specific information */
        armv7m_common_t *armv7m = target->arch_info;
 
-       LOG_USER("target halted due to %s, current mode: %s %s\nxPSR: 0x%8.8x pc: 0x%8.8x",
-                Jim_Nvp_value2name_simple( nvp_target_debug_reason,target->debug_reason)->name,
+       LOG_USER("target halted due to %s, current mode: %s %s\nxPSR: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "",
+                Jim_Nvp_value2name_simple(nvp_target_debug_reason,target->debug_reason)->name,
                armv7m_mode_strings[armv7m->core_mode],
                armv7m_exception_string(armv7m->exception_number),
                buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32),
@@ -543,7 +543,7 @@ int armv7m_register_commands(struct command_context_s *cmd_ctx)
 {
        command_t *arm_adi_v5_dap_cmd;
 
-       arm_adi_v5_dap_cmd = register_command(cmd_ctx, NULL, "dap", NULL, COMMAND_ANY, "cortex dap specific commands");         
+       arm_adi_v5_dap_cmd = register_command(cmd_ctx, NULL, "dap", NULL, COMMAND_ANY, "cortex dap specific commands");
        register_command(cmd_ctx, arm_adi_v5_dap_cmd, "info", handle_dap_info_command, COMMAND_EXEC, "Displays dap info for ap [num], default currently selected AP");
        register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apsel", handle_dap_apsel_command, COMMAND_EXEC, "Select a different AP [num] (default 0)");
        register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apid", handle_dap_apid_command, COMMAND_EXEC, "Displays id reg from AP [num], default currently selected AP");
@@ -600,7 +600,7 @@ int armv7m_checksum_memory(struct target_s *target, uint32_t address, uint32_t c
 
        /* convert flash writing code into a buffer in target endianness */
        for (i = 0; i < (sizeof(cortex_m3_crc_code)/sizeof(uint16_t)); i++)
-               if((retval = target_write_u16(target, crc_algorithm->address + i*sizeof(uint16_t), cortex_m3_crc_code[i])) != ERROR_OK)
+               if ((retval = target_write_u16(target, crc_algorithm->address + i*sizeof(uint16_t), cortex_m3_crc_code[i])) != ERROR_OK)
                {
                        return retval;
                }
@@ -710,7 +710,7 @@ int handle_dap_baseaddr_command(struct command_context_s *cmd_ctx, char *cmd, ch
        apsel = swjdp->apsel;
        apselsave = swjdp->apsel;
        if (argc > 0)
-       {       
+       {
                apsel = strtoul(args[0], NULL, 0);
        }
        if (apselsave != apsel)
@@ -720,7 +720,7 @@ int handle_dap_baseaddr_command(struct command_context_s *cmd_ctx, char *cmd, ch
 
        dap_ap_read_reg_u32(swjdp, 0xF8, &baseaddr);
        retval = swjdp_transaction_endcheck(swjdp);
-       command_print(cmd_ctx, "0x%8.8x", baseaddr);
+       command_print(cmd_ctx, "0x%8.8" PRIx32 "", baseaddr);
 
        if (apselsave != apsel)
        {
@@ -745,7 +745,7 @@ extern int handle_dap_apid_command(struct command_context_s *cmd_ctx, char *cmd,
        apsel = swjdp->apsel;
        apselsave = swjdp->apsel;
        if (argc > 0)
-       {       
+       {
                apsel = strtoul(args[0], NULL, 0);
        }
 
@@ -756,7 +756,7 @@ extern int handle_dap_apid_command(struct command_context_s *cmd_ctx, char *cmd,
 
        dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
        retval = swjdp_transaction_endcheck(swjdp);
-       command_print(cmd_ctx, "0x%8.8x", apid);
+       command_print(cmd_ctx, "0x%8.8" PRIx32 "", apid);
        if (apselsave != apsel)
        {
                dap_ap_select(swjdp, apselsave);
@@ -775,14 +775,14 @@ int handle_dap_apsel_command(struct command_context_s *cmd_ctx, char *cmd, char
 
        apsel = 0;
        if (argc > 0)
-       {       
+       {
                apsel = strtoul(args[0], NULL, 0);
        }
 
        dap_ap_select(swjdp, apsel);
        dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
        retval = swjdp_transaction_endcheck(swjdp);
-       command_print(cmd_ctx, "ap %i selected, identification register 0x%8.8x", apsel, apid);
+       command_print(cmd_ctx, "ap %i selected, identification register 0x%8.8" PRIx32 "", (int)apsel, apid);
 
        return retval;
 }
@@ -796,12 +796,12 @@ int handle_dap_memaccess_command(struct command_context_s *cmd_ctx, char *cmd, c
 
        memaccess_tck = swjdp->memaccess_tck;
        if (argc > 0)
-       {       
+       {
                memaccess_tck = strtoul(args[0], NULL, 0);
        }
 
        swjdp->memaccess_tck = memaccess_tck;
-       command_print(cmd_ctx, "memory bus access delay set to %i tck", swjdp->memaccess_tck);
+       command_print(cmd_ctx, "memory bus access delay set to %i tck", (int)(swjdp->memaccess_tck));
 
        return ERROR_OK;
 }
@@ -816,10 +816,10 @@ int handle_dap_info_command(struct command_context_s *cmd_ctx, char *cmd, char *
 
        apsel =  swjdp->apsel;
        if (argc > 0)
-       {       
+       {
                apsel = strtoul(args[0], NULL, 0);
        }
-       
+
        retval = dap_info_command(cmd_ctx, swjdp, apsel);
 
        return retval;
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