aarch64: fix register list
[openocd.git] / src / target / armv8.c
index 06000c1ebb45a65ab57a695f38faaa50b1856f10..c351dfdfff4e7b4ded9de384506f833d8ed7becf 100644 (file)
@@ -34,7 +34,6 @@
 #include <unistd.h>
 
 #include "armv8_opcodes.h"
-#include "arm_opcodes.h"
 #include "target.h"
 #include "target_type.h"
 
@@ -383,7 +382,7 @@ done:
        return retval;
 }
 
-static int armv8_4K_translate(struct target *target,  uint32_t va, uint32_t *val)
+static int armv8_4K_translate(struct target *target,  target_addr_t va, target_addr_t *val)
 {
        LOG_ERROR("4K page Address translation need to add");
        return ERROR_FAIL;
@@ -391,7 +390,7 @@ static int armv8_4K_translate(struct target *target,  uint32_t va, uint32_t *val
 
 
 /*  method adapted to cortex A : reused arm v4 v5 method*/
-int armv8_mmu_translate_va(struct target *target,  uint32_t va, uint32_t *val)
+int armv8_mmu_translate_va(struct target *target,  target_addr_t va, target_addr_t *val)
 {
        int retval = ERROR_FAIL;
        struct armv8_common *armv8 = target_to_armv8(target);
@@ -465,7 +464,7 @@ static int _armv8_flush_all_data(struct target *target)
                        /*  DCCISW */
                        /* LOG_INFO ("%d %d %x",c_way,c_index,value); */
                        retval = dpm->instr_write_data_r0(dpm,
-                                       ARMV4_5_MCR(15, 0, 0, 7, 14, 2),
+                                       ARMV8_MSR_GP(SYSTEM_DCCISW, 0),
                                        value);
                        if (retval != ERROR_OK)
                                goto done;
@@ -724,6 +723,27 @@ int armv8_init_arch_info(struct target *target, struct armv8_common *armv8)
        return ERROR_OK;
 }
 
+int armv8_aarch64_state(struct target *target)
+{
+       struct arm *arm = target_to_arm(target);
+
+       if (arm->common_magic != ARM_COMMON_MAGIC) {
+               LOG_ERROR("BUG: called for a non-ARM target");
+               return ERROR_FAIL;
+       }
+
+       LOG_USER("target halted in %s state due to %s, current mode: %s\n"
+               "cpsr: 0x%8.8" PRIx32 " pc: 0x%" PRIx64 "%s",
+               armv8_state_strings[arm->core_state],
+               debug_reason_name(target),
+               armv8_mode_name(arm->core_mode),
+               buf_get_u32(arm->cpsr->value, 0, 32),
+               buf_get_u64(arm->pc->value, 0, 64),
+               arm->is_semihosting ? ", semihosting" : "");
+
+       return ERROR_OK;
+}
+
 int armv8_arch_state(struct target *target)
 {
        static const char * const state[] = {
@@ -738,18 +758,15 @@ int armv8_arch_state(struct target *target)
                return ERROR_COMMAND_SYNTAX_ERROR;
        }
 
-       arm_arch_state(target);
+       if (arm->core_state == ARM_STATE_AARCH64)
+               armv8_aarch64_state(target);
+       else
+               arm_arch_state(target);
 
-       if (armv8->is_armv7r) {
-               LOG_USER("D-Cache: %s, I-Cache: %s",
-                       state[armv8->armv8_mmu.armv8_cache.d_u_cache_enabled],
-                       state[armv8->armv8_mmu.armv8_cache.i_cache_enabled]);
-       } else {
-               LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s",
-                       state[armv8->armv8_mmu.mmu_enabled],
-                       state[armv8->armv8_mmu.armv8_cache.d_u_cache_enabled],
-                       state[armv8->armv8_mmu.armv8_cache.i_cache_enabled]);
-       }
+       LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s",
+               state[armv8->armv8_mmu.mmu_enabled],
+               state[armv8->armv8_mmu.armv8_cache.d_u_cache_enabled],
+               state[armv8->armv8_mmu.armv8_cache.i_cache_enabled]);
 
        if (arm->core_mode == ARM_MODE_ABT)
                armv8_show_fault_registers(target);
@@ -768,42 +785,42 @@ static const struct {
        const char *group;
        const char *feature;
 } armv8_regs[] = {
-       { ARMV8_R0,  "x0",  64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R1,  "x1",  64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R2,  "x2",  64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R3,  "x3",  64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R4,  "x4",  64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R5,  "x5",  64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R6,  "x6",  64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R7,  "x7",  64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R8,  "x8",  64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R9,  "x9",  64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R10, "x10", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R11, "x11", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R12, "x12", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R13, "x13", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R14, "x14", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R15, "x15", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R16, "x16", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R17, "x17", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R18, "x18", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R19, "x19", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R20, "x20", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R21, "x21", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R22, "x22", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R23, "x23", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R24, "x24", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R25, "x25", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R26, "x26", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R27, "x27", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R28, "x28", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R29, "x29", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
-       { ARMV8_R30, "x30", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R0,  "x0",  64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R1,  "x1",  64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R2,  "x2",  64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R3,  "x3",  64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R4,  "x4",  64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R5,  "x5",  64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R6,  "x6",  64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R7,  "x7",  64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R8,  "x8",  64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R9,  "x9",  64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R10, "x10", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R11, "x11", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R12, "x12", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R13, "x13", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R14, "x14", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R15, "x15", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R16, "x16", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R17, "x17", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R18, "x18", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R19, "x19", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R20, "x20", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R21, "x21", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R22, "x22", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R23, "x23", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R24, "x24", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R25, "x25", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R26, "x26", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R27, "x27", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R28, "x28", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R29, "x29", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_R30, "x30", 64, REG_TYPE_UINT64, "general", "org.gnu.gdb.aarch64.core" },
 
        { ARMV8_R31, "sp", 64, REG_TYPE_DATA_PTR, "general", "org.gnu.gdb.aarch64.core" },
        { ARMV8_PC,  "pc", 64, REG_TYPE_CODE_PTR, "general", "org.gnu.gdb.aarch64.core" },
 
-       { ARMV8_xPSR, "CPSR", 64, REG_TYPE_INT, "general", "org.gnu.gdb.aarch64.core" },
+       { ARMV8_xPSR, "CPSR", 32, REG_TYPE_UINT32, "general", "org.gnu.gdb.aarch64.core" },
 };
 
 #define ARMV8_NUM_REGS ARRAY_SIZE(armv8_regs)
@@ -828,14 +845,20 @@ static int armv8_set_core_reg(struct reg *reg, uint8_t *buf)
 {
        struct arm_reg *armv8_reg = reg->arch_info;
        struct target *target = armv8_reg->target;
+       struct arm *arm = target_to_arm(target);
        uint64_t value = buf_get_u64(buf, 0, 64);
 
        if (target->state != TARGET_HALTED)
                return ERROR_TARGET_NOT_HALTED;
 
-       buf_set_u64(reg->value, 0, 64, value);
+       if (reg == arm->cpsr) {
+               armv8_set_cpsr(arm, (uint32_t)value);
+       } else {
+               buf_set_u64(reg->value, 0, 64, value);
+               reg->valid = 1;
+       }
+
        reg->dirty = 1;
-       reg->valid = 1;
 
        return ERROR_OK;
 }
@@ -872,7 +895,7 @@ struct reg_cache *armv8_build_reg_cache(struct target *target)
 
                reg_list[i].name = armv8_regs[i].name;
                reg_list[i].size = armv8_regs[i].bits;
-               reg_list[i].value = calloc(1, 4);
+               reg_list[i].value = calloc(1, 8);
                reg_list[i].dirty = 0;
                reg_list[i].valid = 0;
                reg_list[i].type = &armv8_reg_type;

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