+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2015 by David Ung *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
***************************************************************************/
#ifndef OPENOCD_TARGET_ARMV8_H
ARMV8_SP = 31,
ARMV8_PC = 32,
- ARMV8_xPSR = 33,
+ ARMV8_XPSR = 33,
ARMV8_V0 = 34,
ARMV8_V1,
ARMV8_ESR_EL3 = 75,
ARMV8_SPSR_EL3 = 76,
+ /* Pseudo registers defined by GDB to remove the pauth signature. */
+ ARMV8_PAUTH_DMASK = 77,
+ ARMV8_PAUTH_CMASK = 78,
+
ARMV8_LAST_REG,
};
+enum run_control_op {
+ ARMV8_RUNCONTROL_UNKNOWN = 0,
+ ARMV8_RUNCONTROL_RESUME = 1,
+ ARMV8_RUNCONTROL_HALT = 2,
+ ARMV8_RUNCONTROL_STEP = 3,
+};
-#define ARMV8_COMMON_MAGIC 0x0A450AAA
+#define ARMV8_COMMON_MAGIC 0x0A450AAAU
/* VA to PA translation operations opc2 values*/
#define V2PCWPR 0
struct armv8_cachesize {
uint32_t level_num;
- /* cache dimensionning */
+ /* cache dimensioning */
uint32_t linelen;
uint32_t associativity;
uint32_t nsets;
/* l2 external unified cache if some */
void *l2_cache;
int (*flush_all_data_cache)(struct target *target);
- int (*display_cache_info)(struct command_context *cmd_ctx,
+ int (*display_cache_info)(struct command_invocation *cmd,
struct armv8_cache_common *armv8_cache);
};
};
struct armv8_common {
+ unsigned int common_magic;
+
struct arm arm;
- int common_magic;
struct reg_cache *core_cache;
/* Core Debug Unit */
struct arm_dpm dpm;
- uint32_t debug_base;
+ target_addr_t debug_base;
struct adiv5_ap *debug_ap;
const uint32_t *opcodes;
uint8_t pa_size;
uint32_t page_size;
uint64_t ttbr_base;
+ bool is_armv8r;
struct armv8_mmu_common armv8_mmu;
struct arm_cti *cti;
+ /* True if OpenOCD provides pointer auth related info to GDB */
+ bool enable_pauth;
+
+ /* last run-control command issued to this target (resume, halt, step) */
+ enum run_control_op last_run_control_op;
+
/* Direct processor core register read and writes */
int (*read_reg_u64)(struct armv8_common *armv8, int num, uint64_t *value);
int (*write_reg_u64)(struct armv8_common *armv8, int num, uint64_t value);
return container_of(target->arch_info, struct armv8_common, arm);
}
+static inline bool is_armv8(struct armv8_common *armv8)
+{
+ return armv8->common_magic == ARMV8_COMMON_MAGIC;
+}
+
/* register offsets from armv8.debug_base */
#define CPUV8_DBG_MAINID0 0xD00
#define CPUV8_DBG_CPUFEATURE0 0xD20
#define CPUV8_DBG_EDESR 0x20
#define CPUV8_DBG_EDECR 0x24
-#define CPUV8_DBG_WFAR0 0x30
-#define CPUV8_DBG_WFAR1 0x34
+#define CPUV8_DBG_EDWAR0 0x30
+#define CPUV8_DBG_EDWAR1 0x34
#define CPUV8_DBG_DSCR 0x088
#define CPUV8_DBG_DRCR 0x090
+#define CPUV8_DBG_ECCR 0x098
#define CPUV8_DBG_PRCR 0x310
#define CPUV8_DBG_PRSR 0x314
target_addr_t *val, int meminfo);
int armv8_mmu_translate_va(struct target *target, target_addr_t va, target_addr_t *val);
-int armv8_handle_cache_info_command(struct command_context *cmd_ctx,
+int armv8_handle_cache_info_command(struct command_invocation *cmd,
struct armv8_cache_common *armv8_cache);
void armv8_set_cpsr(struct arm *arm, uint32_t cpsr);
}
}
+const char *armv8_mode_name(unsigned psr_mode);
void armv8_select_reg_access(struct armv8_common *armv8, bool is_aarch64);
int armv8_set_dbgreg_bits(struct armv8_common *armv8, unsigned int reg, unsigned long mask, unsigned long value);
+extern void armv8_free_reg_cache(struct target *target);
+
extern const struct command_registration armv8_command_handlers[];
#endif /* OPENOCD_TARGET_ARMV8_H */