target/mips: Use 'bool' data type

[openocd.git] / src / target / armv8.h

diff --git a/src/target/armv8.h b/src/target/armv8.h
index b346462248fe3bead1fac06c6814cef385be5f43..af00e52d618571780c97fac7250a9c7a6d95b63a 100644 (file)
--- a/src/target/armv8.h
+++ b/src/target/armv8.h
@@ -113,6 +113,12 @@ enum {
        ARMV8_LAST_REG,
 };
 
+enum run_control_op {
+       ARMV8_RUNCONTROL_UNKNOWN = 0,
+       ARMV8_RUNCONTROL_RESUME = 1,
+       ARMV8_RUNCONTROL_HALT = 2,
+       ARMV8_RUNCONTROL_STEP = 3,
+};
 
 #define ARMV8_COMMON_MAGIC 0x0A450AAA
 
@@ -210,6 +216,9 @@ struct armv8_common {
 
        struct arm_cti *cti;
 
+       /* last run-control command issued to this target (resume, halt, step) */
+       enum run_control_op last_run_control_op;
+
        /* Direct processor core register read and writes */
        int (*read_reg_u64)(struct armv8_common *armv8, int num, uint64_t *value);
        int (*write_reg_u64)(struct armv8_common *armv8, int num, uint64_t value);
@@ -232,6 +241,11 @@ target_to_armv8(struct target *target)
        return container_of(target->arch_info, struct armv8_common, arm);
 }
 
+static inline bool is_armv8(struct armv8_common *armv8)
+{
+       return armv8->common_magic == ARMV8_COMMON_MAGIC;
+}
+
 /* register offsets from armv8.debug_base */
 #define CPUV8_DBG_MAINID0              0xD00
 #define CPUV8_DBG_CPUFEATURE0  0xD20
@@ -247,6 +261,7 @@ target_to_armv8(struct target *target)
 #define CPUV8_DBG_WFAR1                0x34
 #define CPUV8_DBG_DSCR         0x088
 #define CPUV8_DBG_DRCR         0x090
+#define CPUV8_DBG_ECCR         0x098
 #define CPUV8_DBG_PRCR         0x310
 #define CPUV8_DBG_PRSR         0x314